From: Sibi Sankar <sibis@codeaurora.org>
To: Philipp Zabel <p.zabel@pengutronix.de>
Cc: robh+dt@kernel.org, bjorn.andersson@linaro.org, sboyd@kernel.org,
agross@kernel.org, mani@kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/5] reset: qcom: Add PDC Global reset signals for WPSS
Date: Thu, 29 Apr 2021 11:03:32 +0530 [thread overview]
Message-ID: <e28b74712d66f298af793ceb873216bb@codeaurora.org> (raw)
In-Reply-To: <0c5f747fe0a3f757a4160e4fd28cc2b56a57a39d.camel@pengutronix.de>
Hey Philipp,
Thanks for the review. Will get them
fixed in the next re-spin.
On 2021-04-27 13:28, Philipp Zabel wrote:
> Hi Sibi,
>
> On Tue, 2021-04-27 at 13:03 +0530, Sibi Sankar wrote:
>> Add PDC Global reset signals for Wireless Processor Subsystem (WPSS)
>> on SC7280 SoCs.
>>
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>
>> v2:
>> * place resets and num_resets adjacent to each other [Stephen]
> [...]
>> +struct qcom_pdc_reset_desc {
>> + const struct qcom_pdc_reset_map *resets;
>> + size_t num_resets;
>> + unsigned int offset;
>> +};
> [...]
>
> For consistency, please do the same here:
>
>> +static const struct qcom_pdc_reset_desc sdm845_pdc_reset_desc = {
>> + .resets = sdm845_pdc_resets,
>> + .offset = RPMH_SDM845_PDC_SYNC_RESET,
>> + .num_resets = ARRAY_SIZE(sdm845_pdc_resets),
>> +};
> [...]
>
> and here:
>
>> +static const struct qcom_pdc_reset_desc sc7280_pdc_reset_desc = {
>> + .resets = sc7280_pdc_resets,
>> + .offset = RPMH_SC7280_PDC_SYNC_RESET,
>> + .num_resets = ARRAY_SIZE(sc7280_pdc_resets),
>> +};
>
> [...]
>> @@ -54,19 +89,18 @@ static int qcom_pdc_control_assert(struct
>> reset_controller_dev *rcdev,
>> unsigned long idx)
>> {
>> struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
>> + const struct qcom_pdc_reset_map *map = &data->desc->resets[idx];
>>
>> - return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
>> - BIT(sdm845_pdc_resets[idx].bit),
>> - BIT(sdm845_pdc_resets[idx].bit));
>> + return regmap_update_bits(data->regmap, data->desc->offset,
>> BIT(map->bit), BIT(map->bit));
>> }
>
> Why not go one step further:
>
> u32 mask = BIT(data->desc->resets[idx].bit);
>
> return regmap_update_bits(data->regmap, data->desc->offset, mask,
> mask);
>
> That seems to be a common pattern in other qcom drivers.
will send out a separate patch for
the other reset driver.
> Either way, with the above reset/num_reset changes:
>
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
>
> Also,
>
> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
>
> for the whole series to go through the qcom tree, or let me know if you
> want me to pick up patches 2-4 next round.
>
> regards
> Philipp
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2021-04-29 5:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-27 7:33 [PATCH v2 0/5] Enable miscellaneous hardware blocks to boot WPSS Sibi Sankar
2021-04-27 7:33 ` [PATCH v2 1/5] dt-bindings: mailbox: Add WPSS client index to IPCC Sibi Sankar
2021-05-31 22:19 ` Bjorn Andersson
2021-04-27 7:33 ` [PATCH v2 2/5] dt-bindings: reset: aoss: Add AOSS reset controller binding Sibi Sankar
2021-04-27 7:33 ` [PATCH v2 3/5] dt-bindings: reset: pdc: Add PDC Global bindings Sibi Sankar
2021-04-27 7:33 ` [PATCH v2 4/5] reset: qcom: Add PDC Global reset signals for WPSS Sibi Sankar
2021-04-27 7:58 ` Philipp Zabel
2021-04-29 5:33 ` Sibi Sankar [this message]
2021-05-31 22:04 ` Bjorn Andersson
2021-07-21 10:21 ` Philipp Zabel
2021-04-27 7:33 ` [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add nodes to boot WPSS Sibi Sankar
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