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charset=UTF-8 Content-Transfer-Encoding: 8bit On 28.06.2024 14:39, Geert Uytterhoeven wrote: > On Fri, Jun 28, 2024 at 12:29 PM claudiu beznea > wrote: >> On 28.06.2024 12:13, Geert Uytterhoeven wrote: >>> On Fri, Jun 28, 2024 at 10:12 AM claudiu beznea >>> wrote: >>>> On 28.06.2024 11:09, Biju Das wrote: >>>>>> -----Original Message----- >>>>>> From: claudiu beznea >>>>>> On 28.06.2024 10:55, Biju Das wrote: >>>>>>>> -----Original Message----- >>>>>>>> From: claudiu beznea >>>>>>>> Patch 09/12 "i2c: riic: Add support for fast mode plus" adds a new member to struct >>>>>> riic_of_data. >>>>>>>> That new member is needed to differentiate b/w hardware versions >>>>>>>> supporting fast mode plus based on compatible. >>>>>>> >>>>>>> Are we sure RZ/A does not support fast mode plus? >>>>>> >>>>>> From commit description of patch 09/12: >>>>>> >>>>>> Fast mode plus is available on most of the IP variants that RIIC driver is working with. The >>>>>> exception is (according to HW manuals of the SoCs where this IP is available) the Renesas RZ/A1H. >>>>>> For this, patch introduces the struct riic_of_data::fast_mode_plus. >>>>>> >>>>>> I checked the manuals of all the SoCs where this driver is used. >>>>>> >>>>>> I haven't checked the H/W manual? >>>>>> >>>>>> On the manual I've downloaded from Renesas web site the FMPE bit of RIICnFER is not available on >>>>>> RZ/A1H. >>>>> >>>>> I just found RZ/A2M manual, it supports FMP and register layout looks similar to RZ/G2L. >>>> >>>> I introduced struct riic_of_data::fast_mode_plus because of RZ/A1H. >>> >>> Do you need to check for that? >>> >>> The ICFER_FMPE bit won't be set unless the user specifies the FM+ >>> clock-frequency. Setting clock-frequency beyond Fast Mode on RZ/A1H >>> would be very wrong. >> >> I need it to avoid this scenario ^. In patch 09/12 there is this code: >> >> + if ((!info->fast_mode_plus && t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) || >> + (info->fast_mode_plus && t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ)) { >> + dev_err(dev, "unsupported bus speed (%dHz). %d max\n", t->bus_freq_hz, >> + info->fast_mode_plus ? I2C_MAX_FAST_MODE_PLUS_FREQ : >> + I2C_MAX_FAST_MODE_FREQ); >> return -EINVAL; >> FTR, the full context of this change is (from patch 09/12): @@ -315,11 +319,13 @@ static int riic_init_hw(struct riic_dev *riic) int total_ticks, cks, brl, brh; struct i2c_timings *t = &riic->i2c_t; struct device *dev = riic->adapter.dev.parent; + const struct riic_of_data *info = riic->info; - if (t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) { - dev_err(dev, - "unsupported bus speed (%dHz). %d max\n", - t->bus_freq_hz, I2C_MAX_FAST_MODE_FREQ); + if ((!info->fast_mode_plus && t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) || + (info->fast_mode_plus && t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ)) { + dev_err(dev, "unsupported bus speed (%dHz). %d max\n", t->bus_freq_hz, + info->fast_mode_plus ? I2C_MAX_FAST_MODE_PLUS_FREQ : + I2C_MAX_FAST_MODE_FREQ); return -EINVAL; } Thank you, Claudiu Beznea >> to avoid giving the user the possibility to set FM+ freq on platforms not >> supporting it. >> >> Please let me know if I'm missing something (or wrongly understood your >> statement). > > Wolfram/Andi: what is your view on this? > > Gr{oetje,eeting}s, > > Geert >