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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Akhil P Oommen <akhilpo@oss.qualcomm.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Clark <robin.clark@oss.qualcomm.com>,
	Dmitry Baryshkov <lumag@kernel.org>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Jessica Zhang <jesszhan0024@gmail.com>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>
Cc: Sean Paul <sean@poorly.run>,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: [PATCH v2 5/8] arm64: dts: qcom: Add GPU support for Kaanapali
Date: Mon, 6 Jul 2026 11:37:56 +0200	[thread overview]
Message-ID: <e2b7e03f-911b-41cd-8ac4-044492e2bdbc@oss.qualcomm.com> (raw)
In-Reply-To: <20260705-kaana-gpu-dt-v2-5-6ac53de56314@oss.qualcomm.com>

On 7/5/26 10:00 AM, Akhil P Oommen wrote:
> Adreno 840 present in Kaanapali SoC is the second generation GPU in
> A8x family. It is based on the new slice architecture with 3 slices,
> higher GMEM/caches etc.
> 
> There is some re-arrangement in the reglist to properly cover maximum
> register region. Other than this, the DT description is mostly similar
> to the existing chipsets except the OPP tables.
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
> ---

[...]

> +			qcom,gmu = <&gmu>;
> +			#cooling-cells = <2>;
> +
> +			nvmem-cells = <&gpu_speed_bin>;
> +			nvmem-cell-names = "speed_bin";

This looks good to me, but I thought that on a8x, we're supposed to use
the freq limiting register in CX_MISC - is either of them preferred?
Or are they just hardwired to the same thing by chance

Konrad

  reply	other threads:[~2026-07-06  9:38 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-05  8:00 [PATCH v2 0/8] arm64: dts: qcom: Devicetree support for Kaanapali GPU Akhil P Oommen
2026-07-05  8:00 ` [PATCH v2 1/8] drm/msm/a6xx: Increase HFI GX perf level limit to 24 Akhil P Oommen
2026-07-05  8:17   ` sashiko-bot
2026-07-05 12:08   ` Akhil P Oommen
2026-07-05  8:00 ` [PATCH v2 2/8] dt-bindings: display/msm: gpu: Document Adreno 840 Akhil P Oommen
2026-07-06  6:36   ` Krzysztof Kozlowski
2026-07-05  8:00 ` [PATCH v2 3/8] arm64: dts: qcom: kaanapali: add the GPU SMMU node Akhil P Oommen
2026-07-06  9:33   ` Konrad Dybcio
2026-07-05  8:00 ` [PATCH v2 4/8] arm64: dts: qcom: kaanapali: Add QFPROM node Akhil P Oommen
2026-07-06  9:35   ` Konrad Dybcio
2026-07-05  8:00 ` [PATCH v2 5/8] arm64: dts: qcom: Add GPU support for Kaanapali Akhil P Oommen
2026-07-06  9:37   ` Konrad Dybcio [this message]
2026-07-06 20:06     ` Akhil P Oommen
2026-07-05  8:00 ` [PATCH v2 6/8] arm64: dts: qcom: kaanapali: Add GPU cooling Akhil P Oommen
2026-07-06  9:39   ` Konrad Dybcio
2026-07-05  8:00 ` [PATCH v2 7/8] arm64: dts: qcom: kaanapali-mtp: Enable GPU Akhil P Oommen
2026-07-05  8:00 ` [PATCH v2 8/8] arm64: dts: qcom: kaanapali-qrd: " Akhil P Oommen

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