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AJvYcCWNg88wwR3XZZG3dPeHEfoKVhqUYhv8WO1tHgicpZWtUIqtBjqTM3W53c6w/ntpwOHKhix/+KskuJAr@vger.kernel.org X-Gm-Message-State: AOJu0YyP26X4cg6c1sUfhEI5J2keok/CLNar7Dx6cKiFShuk0BNMAXSd jE2lFEB+0/2aXP9BggvlDQzU9BVX6n5lGyM7nHqFMP2TafsUtpI1jgk9gSU4Y64= X-Google-Smtp-Source: AGHT+IH88P2UchQfuyJn4Ig/8aL8sFGLYB2Le79fmkAMZIjuFdt4o/On+vh4v2Bfc56FcpWJDt9N3A== X-Received: by 2002:a17:906:6a09:b0:a7d:9f92:9107 with SMTP id a640c23a62f3a-a897fad4ec9mr1154579666b.58.1725288920667; Mon, 02 Sep 2024 07:55:20 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.144]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8989196980sm566454166b.126.2024.09.02.07.55.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Sep 2024 07:55:20 -0700 (PDT) Message-ID: Date: Mon, 2 Sep 2024 17:55:18 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 01/12] dt-bindings: clock: renesas,r9a08g045-vbattb: Document VBATTB Content-Language: en-US To: Alexandre Belloni , Rob Herring Cc: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com, p.zabel@pengutronix.de, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea References: <20240830130218.3377060-1-claudiu.beznea.uj@bp.renesas.com> <20240830130218.3377060-2-claudiu.beznea.uj@bp.renesas.com> <20240830174633.GA559043-robh@kernel.org> <20240830220644b8b36293@mail.local> From: claudiu beznea In-Reply-To: <20240830220644b8b36293@mail.local> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.08.2024 01:06, Alexandre Belloni wrote: > On 30/08/2024 12:46:33-0500, Rob Herring wrote: >> On Fri, Aug 30, 2024 at 04:02:07PM +0300, Claudiu wrote: >>> From: Claudiu Beznea >>> >>> The VBATTB IP of the Renesas RZ/G3S SoC controls the clock for RTC, >>> the tamper detector and a small general usage memory of 128B. Add >>> documentation for it. >>> >>> Signed-off-by: Claudiu Beznea >>> --- >>> >>> Changes in v3: >>> - moved the file to clock dt bindings directory as it is the >>> only functionality supported at the moment; the other functionalities >>> (tamper detector, SRAM) are offered though register spreaded >>> though the address space of the VBATTB IP and not actually >>> individual devices; the other functionalities are not >>> planned to be supported soon and if they will be I think they >>> fit better on auxiliary bus than MFD >>> - dropped interrupt names as requested in the review process >>> - dropped the inner node for clock controller >>> - added #clock-cells >>> - added rtx clock >>> - updated description for renesas,vbattb-load-nanofarads >>> - included dt-bindings/interrupt-controller/irq.h in examples section >>> >>> Changes in v2: >>> - changed file name and compatible >>> - updated title, description sections >>> - added clock controller part documentation and drop dedicated file >>> for it included in v1 >>> - used items to describe interrupts, interrupt-names, clocks, clock-names, >>> resets >>> - dropped node labels and status >>> - updated clock-names for clock controller to cope with the new >>> logic on detecting the necessity to setup bypass >>> >>> .../clock/renesas,r9a08g045-vbattb.yaml | 81 +++++++++++++++++++ >>> 1 file changed, 81 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml >>> new file mode 100644 >>> index 000000000000..29df0e01fae5 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/clock/renesas,r9a08g045-vbattb.yaml >>> @@ -0,0 +1,81 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/clock/renesas,r9a08g045-vbattb.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Renesas Battery Backup Function (VBATTB) >>> + >>> +description: >>> + Renesas VBATTB is an always on powered module (backed by battery) which >>> + controls the RTC clock (VBATTCLK), tamper detection logic and a small >>> + general usage memory (128B). >>> + >>> +maintainers: >>> + - Claudiu Beznea >>> + >>> +properties: >>> + compatible: >>> + const: renesas,r9a08g045-vbattb >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + interrupts: >>> + items: >>> + - description: tamper detector interrupt >>> + >>> + clocks: >>> + items: >>> + - description: VBATTB module clock >>> + - description: RTC input clock (crystal oscillator or external clock device) >>> + >>> + clock-names: >>> + items: >>> + - const: bclk >>> + - const: rtx >>> + >>> + '#clock-cells': >>> + const: 1 >>> + >>> + power-domains: >>> + maxItems: 1 >>> + >>> + resets: >>> + items: >>> + - description: VBATTB module reset >>> + >>> + renesas,vbattb-load-nanofarads: >> >> Use defined units, don't add your own. So -picofarads should work for >> you. > > We have a generic quartz-load-femtofarads property for RTCs which is > what you define because the driver has VBATTB_XOSCCR_XSEL_4_PF which I > guess is 4 pF which is 0.004 nF and 4000 fF. I'll use this one in the next version. Thank you for your review, Claudiu Beznea > >> >>> + description: load capacitance of the on board crystal oscillator >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + enum: [ 4000, 7000, 9000, 12500 ] >>> + >>> +required: >>> + - compatible >>> + - reg >>> + - interrupts >>> + - clocks >>> + - clock-names >>> + - '#clock-cells' >>> + - power-domains >>> + - resets >>> + >>> +additionalProperties: false >>> + >>> +examples: >>> + - | >>> + #include >>> + #include >>> + #include >>> + >>> + vbattb@1005c000 { >> >> clock-controller@... >> >>> + compatible = "renesas,r9a08g045-vbattb"; >>> + reg = <0x1005c000 0x1000>; >>> + interrupts = ; >>> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>; >>> + clock-names = "bclk", "rtx"; >>> + #clock-cells = <1>; >>> + power-domains = <&cpg>; >>> + resets = <&cpg R9A08G045_VBAT_BRESETN>; >>> + renesas,vbattb-load-nanofarads = <12500>; >>> + }; >>> -- >>> 2.39.2 >>> >