From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 843AEC43334 for ; Tue, 5 Jul 2022 13:20:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232384AbiGENU6 (ORCPT ); Tue, 5 Jul 2022 09:20:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232420AbiGENUn (ORCPT ); Tue, 5 Jul 2022 09:20:43 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C843D3BBD3 for ; Tue, 5 Jul 2022 05:42:11 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id f39so20347500lfv.3 for ; Tue, 05 Jul 2022 05:42:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :cc:references:from:in-reply-to:content-transfer-encoding; bh=ShCrJ4hyEx4vHUXU6iKjtj3Ok0nVe/BM9eUFlsSXi44=; b=JzmVzJA4dIVMLfeMhkcD8TkJf4Dhaw5aFkZ/vxR42AzuPuMS65TpOHdxsK8diBpyOK D7gjCqMOh+EDffLsnXSXNkTT4+4+8snyflCytiWIK7+84hhUoAjDqF7dDhE/ROkMjfB8 1TyLmD1qJNz6hF4zO8pF81pbqarxwFAVDVKIzCiA2LHWfykK4Z+XSY0Y8ts4EXAV1n0/ ArJJeaGDl/zfyADJSbqJSY9UxqG7GscZ70Z4YSfmL4PSkcdTlg+4t1q2LE0z08nv8xg9 2BcpwWulYhiRJ2hUnHkiiveVfFUulQPVYZtmq2IGwBexsH89zo5/sFu/p2wvGOhBGyIu zrNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=ShCrJ4hyEx4vHUXU6iKjtj3Ok0nVe/BM9eUFlsSXi44=; b=f/ZOXTcsntPtHZIZ3XKyDNUtiAvwaFwZwP3tUD+QoaQ5AstRt1mm50PjX8XJpQz1Q7 tdJmbCsmbUdplBPH1v/5hcEFbFEdQHGgIbBT6DtHHRJyUC1QOyOy+PL53EWxHnRrssM4 DPyuOAdpaTCAbWcSeeu6mRN8EUnpd6CFI6zoG+ZjN0xkLGX5FYen7hTaXuXjbTcdDcDw PaIKxe1n0zuwFYCNUUqim+Ra1D2lFJgif+n5fqpY4pG1fu5UcdgsRzvA8ss34sgeB/JH H3DT4a47pTeFwZgXgxKaU06PwrRKrtT6COJcjmf+1q/CK+rW+SPc1gjGoMrSiJp8nkBX OaRA== X-Gm-Message-State: AJIora8DeWV2i1NpGXPgqkV71XUoJE1VYHFi2B82yNOqY5G//Lx+LyOq P8KEQhnY2LODEd8HSswPBoNyVA== X-Google-Smtp-Source: AGRyM1vdICLYmSOmQ9/Rc7nIkxH0E0qUR6oXT6Sir3njqmqkWHDhkB6/IPMiO7T1OLEE8aSUphi7Fw== X-Received: by 2002:a05:6512:3ca5:b0:481:3378:b9b7 with SMTP id h37-20020a0565123ca500b004813378b9b7mr22304277lfv.56.1657024929537; Tue, 05 Jul 2022 05:42:09 -0700 (PDT) Received: from [192.168.1.211] ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id n10-20020a0565120aca00b0047f77c979f3sm5674924lfu.235.2022.07.05.05.42.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 Jul 2022 05:42:09 -0700 (PDT) Message-ID: Date: Tue, 5 Jul 2022 15:42:08 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH 01/14] arm64: dts: qcom: sc7280: drop PCIe PHY clock index Content-Language: en-GB To: Johan Hovold , Bjorn Andersson Cc: Andy Gross , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220705114032.22787-1-johan+linaro@kernel.org> <20220705114032.22787-2-johan+linaro@kernel.org> From: Dmitry Baryshkov In-Reply-To: <20220705114032.22787-2-johan+linaro@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 05/07/2022 14:40, Johan Hovold wrote: > The QMP PCIe PHY provides a single clock so drop the redundant clock > index. > > Signed-off-by: Johan Hovold Hmm. After checking the source code, the clocks entry of the phy@1c0e000 node also needs to be fixed. And also maybe: Fixes: bd7d507935ca ("arm64: dts: qcom: sc7280: Add pcie clock support") Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index e66fc67de206..b0ae2dbba50f 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -818,7 +818,7 @@ gcc: clock-controller@100000 { > reg = <0 0x00100000 0 0x1f0000>; > clocks = <&rpmhcc RPMH_CXO_CLK>, > <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, > - <0>, <&pcie1_lane 0>, > + <0>, <&pcie1_lane>, > <0>, <0>, <0>, <0>; > clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", > "pcie_0_pipe_clk", "pcie_1_pipe_clk", > @@ -2110,7 +2110,7 @@ pcie1_lane: phy@1c0e200 { > clock-names = "pipe0"; > > #phy-cells = <0>; > - #clock-cells = <1>; > + #clock-cells = <0>; > clock-output-names = "pcie_1_pipe_clk"; > }; > }; -- With best wishes Dmitry