* [PATCH 05/10] dt-bindings: clock: Add Marvell PXA1908 clock bindings [not found] <20230721210042.21535-1-duje.mihanovic@skole.hr> @ 2023-07-21 20:37 ` Duje Mihanović 2023-07-22 9:21 ` Krzysztof Kozlowski 2023-07-21 20:37 ` [PATCH 06/10] dt-bindings: clock: Add documentation for Marvell PXA1908 Duje Mihanović ` (2 subsequent siblings) 3 siblings, 1 reply; 12+ messages in thread From: Duje Mihanović @ 2023-07-21 20:37 UTC (permalink / raw) To: Duje Mihanović, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-kernel, linux-arm-kernel, linux-clk, devicetree Cc: ~postmarketos/upstreaming, phone-devel, afaerber Add the dt bindings for Marvell PXA1908 clock controller. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> --- include/dt-bindings/clock/marvell,pxa1908.h | 93 +++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 include/dt-bindings/clock/marvell,pxa1908.h diff --git a/include/dt-bindings/clock/marvell,pxa1908.h b/include/dt-bindings/clock/marvell,pxa1908.h new file mode 100644 index 000000000000..da9c5d499ae4 --- /dev/null +++ b/include/dt-bindings/clock/marvell,pxa1908.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __DTS_MARVELL_PXA1908_CLOCK_H +#define __DTS_MARVELL_PXA1908_CLOCK_H + +/* plls */ +#define PXA1908_CLK_CLK32 0x1 +#define PXA1908_CLK_VCTCXO 0x2 +#define PXA1908_CLK_PLL1_624 0x3 +#define PXA1908_CLK_PLL1_416 0x4 +#define PXA1908_CLK_PLL1_499 0x5 +#define PXA1908_CLK_PLL1_832 0x6 +#define PXA1908_CLK_PLL1_1248 0x7 +#define PXA1908_CLK_PLL1_D2 0x8 +#define PXA1908_CLK_PLL1_D4 0x9 +#define PXA1908_CLK_PLL1_D8 0xa +#define PXA1908_CLK_PLL1_D16 0xb +#define PXA1908_CLK_PLL1_D6 0xc +#define PXA1908_CLK_PLL1_D12 0xd +#define PXA1908_CLK_PLL1_D24 0xe +#define PXA1908_CLK_PLL1_D48 0xf +#define PXA1908_CLK_PLL1_D96 0x10 +#define PXA1908_CLK_PLL1_D13 0x11 +#define PXA1908_CLK_PLL1_32 0x12 +#define PXA1908_CLK_PLL1_208 0x13 +#define PXA1908_CLK_PLL1_117 0x14 +#define PXA1908_CLK_PLL1_416_GATE 0x15 +#define PXA1908_CLK_PLL1_624_GATE 0x16 +#define PXA1908_CLK_PLL1_832_GATE 0x17 +#define PXA1908_CLK_PLL1_1248_GATE 0x18 +#define PXA1908_CLK_PLL1_D2_GATE 0x19 +#define PXA1908_CLK_PLL1_499_EN 0x1a +#define PXA1908_CLK_PLL2VCO 0x1b +#define PXA1908_CLK_PLL2 0x1c +#define PXA1908_CLK_PLL2P 0x1d +#define PXA1908_CLK_PLL2VCODIV3 0x1e +#define PXA1908_CLK_PLL3VCO 0x1f +#define PXA1908_CLK_PLL3 0x20 +#define PXA1908_CLK_PLL3P 0x21 +#define PXA1908_CLK_PLL3VCODIV3 0x22 +#define PXA1908_CLK_PLL4VCO 0x23 +#define PXA1908_CLK_PLL4 0x24 +#define PXA1908_CLK_PLL4P 0x25 +#define PXA1908_CLK_PLL4VCODIV3 0x26 +#define PXA1908_MPMU_NR_CLKS 38 + +/* apb (apbc) peripherals */ +#define PXA1908_CLK_UART0 0x1 +#define PXA1908_CLK_UART1 0x2 +#define PXA1908_CLK_GPIO 0x3 +#define PXA1908_CLK_PWM0 0x4 +#define PXA1908_CLK_PWM1 0x5 +#define PXA1908_CLK_PWM2 0x6 +#define PXA1908_CLK_PWM3 0x7 +#define PXA1908_CLK_SSP0 0x8 +#define PXA1908_CLK_SSP1 0x9 +#define PXA1908_CLK_IPC_RST 0xa +#define PXA1908_CLK_RTC 0xb +#define PXA1908_CLK_TWSI0 0xc +#define PXA1908_CLK_KPC 0xd +#define PXA1908_CLK_SWJTAG 0x11 +#define PXA1908_CLK_SSP2 0x14 +#define PXA1908_CLK_TWSI1 0x19 +#define PXA1908_CLK_THERMAL 0x1c +#define PXA1908_CLK_TWSI3 0x1d +#define PXA1908_APBC_NR_CLKS 0x30 + +/* apb (apbcp) peripherals */ +#define PXA1908_CLK_UART2 0x7 +#define PXA1908_CLK_TWSI2 0xa +#define PXA1908_CLK_AICER 0xe +#define PXA1908_APBCP_NR_CLKS 0xe + +/* axi (apmu) peripherals */ +#define PXA1908_CLK_CCIC1 0x9 +#define PXA1908_CLK_ISP 0xe +#define PXA1908_CLK_GATE_CTRL 0x10 +#define PXA1908_CLK_DSI1 0x11 +#define PXA1908_CLK_DISP1 0x13 +#define PXA1908_CLK_CCIC0 0x14 +#define PXA1908_CLK_SDH0 0x15 +#define PXA1908_CLK_SDH1 0x16 +#define PXA1908_CLK_SDH2 0x38 +#define PXA1908_CLK_USB 0x17 +#define PXA1908_CLK_NF 0x18 +#define PXA1908_CLK_CORE_DEBUG 0x24 +#define PXA1908_CLK_VPU 0x29 +#define PXA1908_CLK_GC 0x51 +#define PXA1908_CLK_GC2D 0x3d +#define PXA1908_CLK_TRACE 0x42 +#define PXA1908_CLK_DVC_DFC_DEBUG 0x50 +#define PXA1908_APMU_NR_CLKS 0x60 + +#endif -- 2.41.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 05/10] dt-bindings: clock: Add Marvell PXA1908 clock bindings 2023-07-21 20:37 ` [PATCH 05/10] dt-bindings: clock: Add Marvell PXA1908 clock bindings Duje Mihanović @ 2023-07-22 9:21 ` Krzysztof Kozlowski 0 siblings, 0 replies; 12+ messages in thread From: Krzysztof Kozlowski @ 2023-07-22 9:21 UTC (permalink / raw) To: Duje Mihanović, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-kernel, linux-arm-kernel, linux-clk, devicetree Cc: ~postmarketos/upstreaming, phone-devel, afaerber On 21/07/2023 22:37, Duje Mihanović wrote: > Add the dt bindings for Marvell PXA1908 clock controller. > Squash the patch with bindings change. It has little sense on its own, > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> > --- > include/dt-bindings/clock/marvell,pxa1908.h | 93 +++++++++++++++++++++ > 1 file changed, 93 insertions(+) > create mode 100644 include/dt-bindings/clock/marvell,pxa1908.h > > diff --git a/include/dt-bindings/clock/marvell,pxa1908.h b/include/dt-bindings/clock/marvell,pxa1908.h > new file mode 100644 > index 000000000000..da9c5d499ae4 > --- /dev/null > +++ b/include/dt-bindings/clock/marvell,pxa1908.h > @@ -0,0 +1,93 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ Dual license. Didn't checkpatch complain? > +#ifndef __DTS_MARVELL_PXA1908_CLOCK_H > +#define __DTS_MARVELL_PXA1908_CLOCK_H > + > +/* plls */ > +#define PXA1908_CLK_CLK32 0x1 > +#define PXA1908_CLK_VCTCXO 0x2 > +#define PXA1908_CLK_PLL1_624 0x3 IDs are decimal numbers. > +#define PXA1908_CLK_PLL1_416 0x4 > +#define PXA1908_CLK_PLL1_499 0x5 > +#define PXA1908_CLK_PLL1_832 0x6 > +#define PXA1908_CLK_PLL1_1248 0x7 > +#define PXA1908_CLK_PLL1_D2 0x8 Best regards, Krzysztof ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 06/10] dt-bindings: clock: Add documentation for Marvell PXA1908 [not found] <20230721210042.21535-1-duje.mihanovic@skole.hr> 2023-07-21 20:37 ` [PATCH 05/10] dt-bindings: clock: Add Marvell PXA1908 clock bindings Duje Mihanović @ 2023-07-21 20:37 ` Duje Mihanović 2023-07-22 9:23 ` Krzysztof Kozlowski 2023-07-21 20:37 ` [PATCH 08/10] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte Duje Mihanović 2023-07-21 20:37 ` [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC Duje Mihanović 3 siblings, 1 reply; 12+ messages in thread From: Duje Mihanović @ 2023-07-21 20:37 UTC (permalink / raw) To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, �, linux-clk, devicetree, linux-kernel Cc: ~postmarketos/upstreaming, phone-devel, afaerber Add dt bindings and documentation for Marvell PXA1908's clock controller blocks. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> --- .../bindings/clock/marvell,pxa1908.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml new file mode 100644 index 000000000000..3fa6f00a26f7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,pxa1908.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell PXA1908 Clock Controllers + +maintainers: + - Duje Mihanović <duje.mihanovic@skole.hr> + +description: | + The PXA1908 clock subsystem generates and supplies clock to various + controllers within the PXA1908 SoC. The PXA1908 contains numerous clock + controller blocks, with the ones currently supported being APBC, APBCP, MPMU + and APMU roughly corresponding to internal buses. + + Each clock is assigned an identifier and client nodes use this identifier to + specify the clock which they consume. + + All these identifiers could be found in <include/dt-bindings/marvell,pxa1908.h>. + +properties: + compatible: + enum: + - marvell,pxa1908-apbc + - marvell,pxa1908-apbcp + - marvell,pxa1908-mpmu + - marvell,pxa1908-apmu + reg: + maxItems: 1 + description: | + Physical address of the clock controller and length of the memory mapped + region. + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + # APMU block: + - | + clock-controller@d4282800 { + compatible = "marvell,pxa1908-apmu"; + reg = <0xd4282800 0x400>; + #clock-cells = <1>; + }; -- 2.41.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 06/10] dt-bindings: clock: Add documentation for Marvell PXA1908 2023-07-21 20:37 ` [PATCH 06/10] dt-bindings: clock: Add documentation for Marvell PXA1908 Duje Mihanović @ 2023-07-22 9:23 ` Krzysztof Kozlowski 0 siblings, 0 replies; 12+ messages in thread From: Krzysztof Kozlowski @ 2023-07-22 9:23 UTC (permalink / raw) To: Duje Mihanović, Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-clk, devicetree, linux-kernel Cc: ~postmarketos/upstreaming, phone-devel, afaerber On 21/07/2023 22:37, Duje Mihanović wrote: > Add dt bindings and documentation for Marvell PXA1908's clock controller > blocks. > > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> > --- > .../bindings/clock/marvell,pxa1908.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml > > diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml > new file mode 100644 > index 000000000000..3fa6f00a26f7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/marvell,pxa1908.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell PXA1908 Clock Controllers > + > +maintainers: > + - Duje Mihanović <duje.mihanovic@skole.hr> > + > +description: | > + The PXA1908 clock subsystem generates and supplies clock to various > + controllers within the PXA1908 SoC. The PXA1908 contains numerous clock > + controller blocks, with the ones currently supported being APBC, APBCP, MPMU > + and APMU roughly corresponding to internal buses. > + > + Each clock is assigned an identifier and client nodes use this identifier to > + specify the clock which they consume. Drop this sentence, it's obvious. > + > + All these identifiers could be found in <include/dt-bindings/marvell,pxa1908.h>. "Clock identifiers ..." > + > +properties: > + compatible: > + enum: > + - marvell,pxa1908-apbc > + - marvell,pxa1908-apbcp > + - marvell,pxa1908-mpmu > + - marvell,pxa1908-apmu Blank line > + reg: > + maxItems: 1 > + description: | > + Physical address of the clock controller and length of the memory mapped > + region. Drop description, it is obvious. > + > + '#clock-cells': > + const: 1 Best regards, Krzysztof ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 08/10] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte [not found] <20230721210042.21535-1-duje.mihanovic@skole.hr> 2023-07-21 20:37 ` [PATCH 05/10] dt-bindings: clock: Add Marvell PXA1908 clock bindings Duje Mihanović 2023-07-21 20:37 ` [PATCH 06/10] dt-bindings: clock: Add documentation for Marvell PXA1908 Duje Mihanović @ 2023-07-21 20:37 ` Duje Mihanović 2023-07-22 9:25 ` Krzysztof Kozlowski 2023-07-21 20:37 ` [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC Duje Mihanović 3 siblings, 1 reply; 12+ messages in thread From: Duje Mihanović @ 2023-07-21 20:37 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Duje Mihanović, Kees Cook, Tony Luck, Guilherme G. Piccoli, devicetree, linux-kernel, linux-arm-kernel, linux-hardening Cc: ~postmarketos/upstreaming, phone-devel, afaerber Add DTS for Marvell PXA1908 SoC and Samsung Galaxy Core Prime Value Edition LTE, a smartphone based on said SoC. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> --- arch/arm64/boot/dts/marvell/Makefile | 1 + .../pxa1908-samsung-coreprimevelte.dts | 321 ++++++++++++++++++ arch/arm64/boot/dts/marvell/pxa1908.dtsi | 298 ++++++++++++++++ 3 files changed, 620 insertions(+) create mode 100644 arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts create mode 100644 arch/arm64/boot/dts/marvell/pxa1908.dtsi diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index 79ac09b58a89..0e277a0d368b 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -27,3 +27,4 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb +dtb-$(CONFIG_ARCH_MMP) += pxa1908-samsung-coreprimevelte.dtb diff --git a/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts new file mode 100644 index 000000000000..3e10a77a106e --- /dev/null +++ b/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include "pxa1908.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> + +/ { + pxa,rev-id = <3928 2>; + model = "Samsung Galaxy Core Prime VE LTE"; + compatible = "samsung,coreprimevelte", "marvell,pxa1908"; + + /* Bootloader fills this in */ + memory { + device_type = "memory"; + reg = <0 0 0 0>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer@17000000 { + reg = <0 0x17000000 0 0x1800000>; + no-map; + }; + + gpu@9000000 { + reg = <0 0x9000000 0 0x1000000>; + }; + + /* Communications processor, aka modem */ + cp@3000000 { + reg = <0 0x3000000 0 0x5000000>; + }; + + cm3@a000000 { + reg = <0 0xa000000 0 0x80000>; + }; + + seclog@8000000 { + reg = <0 0x8000000 0 0x100000>; + }; + + ramoops@8100000 { + compatible = "ramoops"; + reg = <0 0x8100000 0 0x40000>; + record-size = <0x8000>; + console-size = <0x20000>; + max-reason = <5>; + }; + }; + + fb0: framebuffer@17177000 { + compatible = "simple-framebuffer"; + reg = <0 0x17177000 0 (480 * 800 * 4)>; + width = <480>; + height = <800>; + stride = <(480 * 4)>; + format = "a8r8g8b8"; + }; + + muic-i2c { + compatible = "i2c-gpio"; + sda-gpios = <&gpio 30 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio 29 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <3>; + i2c-gpio,timeout-ms = <100>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&muic_i2c_pins>; + + muic: extcon@14 { + compatible = "siliconmitus,sm5504-muic"; + reg = <0x14>; + interrupt-parent = <&gpio>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins>; + autorepeat; + + key-home { + label = "Home"; + linux,code = <KEY_HOME>; + gpios = <&gpio 50 GPIO_ACTIVE_LOW>; + }; + + key-volup { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + key-voldown { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + }; + + chosen {}; +}; + +&smmu { + status = "okay"; +}; + +&pmx { + pinctrl-single,gpio-range = <&range 55 55 0>, + <&range 110 32 0>, + <&range 52 1 0>; + + pinctrl-names = "default"; + pinctrl-0 = <&board_pins_1 &board_pins_2 &board_pins_3>; + + board_pins_1: pinmux_board_1 { + pinctrl-single,pins = < + 0x160 0 + 0x164 0 + 0x168 0 + 0x16c 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0x8000 0x8000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0x8000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0x288 0x388>; + }; + + board_pins_2: pinmux_board_2 { + pinctrl-single,pins = < + 0x44 1 + 0x48 1 + 0x20 1 + 0x18 1 + 0x14 1 + 0x10 1 + 0xc 1 + 0x8 1 + 0x68 1 + 0x58 0 + 0x54 0 + 0x7c 0 + 0x6c 0 + 0x70 0 + 0x4c 1 + 0x50 1 + 0xac 0 + 0x90 0 + 0x8c 0 + 0x88 0 + 0x84 0 + 0xc8 0 + 0x128 0 + 0x190 0 + 0x194 0 + 0x1a0 0 + 0x114 0 + 0x118 0 + 0x1d8 0 + 0x1e4 0 + 0xe8 0 + 0x100 0 + 0x204 0 + 0x210 0 + 0x218 0 + >; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xc000>; + pinctrl-single,low-power-mode = <0x288 0x388>; + }; + + board_pins_3: pinmux_board_3 { + pinctrl-single,pins = < + 0x260 0 + 0x264 0 + 0x268 0 + 0x26c 0 + 0x270 0 + 0x274 0 + 0x78 0 + 0x74 0 + 0xb0 1 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + uart0_pins: pinmux_uart0 { + pinctrl-single,pins = < + 0x198 6 + 0x19c 6 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + gpio_keys_pins: pinmux_gpio_keys { + pinctrl-single,pins = < + 0x11c 0 + 0x120 0 + 0x1a4 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa0000 0x8000 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + muic_i2c_pins: pinmux_muic_i2c { + pinctrl-single,pins = < + 0x154 0 + 0x150 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0x288 0x388>; + }; + + sdh0_pins_1: pinmux_sdh0_1 { + pinctrl-single,pins = < + 0x108 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + sdh0_pins_2: pinmux_sdh0_2 { + pinctrl-single,pins = < + 0x94 0 + 0x98 0 + 0x9c 0 + 0xa0 0 + 0xa4 0 + >; + pinctrl-single,drive-strength = <0x800 0x1800>; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + sdh0_pins_3: pinmux_sdh0_3 { + pinctrl-single,pins = < + 0xa8 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0x208 0x388>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; +}; + +&twsi0 { + status = "okay"; +}; + +&twsi1 { + status = "okay"; +}; + +&twsi2 { + status = "okay"; +}; + +&twsi3 { + status = "okay"; +}; + +&usb { + extcon = <&muic>, <&muic>; +}; + +&sdh2 { + /* Disabled for now because initialization fails with -ETIMEDOUT. */ + status = "disabled"; + bus-width = <8>; + non-removable; + broken-cd; + mmc-ddr-1_8v; +}; + +&sdh0 { + pinctrl-names = "default"; + pinctrl-0 = <&sdh0_pins_1 &sdh0_pins_2 &sdh0_pins_3>; + cd-gpios = <&gpio 11 0>; + cd-inverted; + bus-width = <4>; + wp-inverted; +}; diff --git a/arch/arm64/boot/dts/marvell/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/pxa1908.dtsi new file mode 100644 index 000000000000..7131b2070b72 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/pxa1908.dtsi @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/marvell,pxa1908.h> + +/ { + model = "Marvell Armada PXA1908"; + compatible = "marvell,pxa1908"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0>; + enable-method = "psci"; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 1>; + enable-method = "psci"; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 2>; + enable-method = "psci"; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 3>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + smmu: iommu@c0010000 { + compatible = "arm,mmu-400"; + reg = <0 0xc0010000 0 0x10000>; + #global-interrupts = <1>; + #iommu-cells = <1>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + gic: interrupt-controller@d1df9000 { + compatible = "arm,gic-400"; + reg = <0 0xd1df9000 0 0x1000>, + <0 0xd1dfa000 0 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + apb@d4000000 { + compatible = "simple-bus"; + reg = <0 0xd4000000 0 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xd4000000 0x200000>; + + pdma: dma-controller@0 { + compatible = "marvell,pdma-1.0"; + reg = <0 0x10000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + dma-channels = <30>; + #dma-cells = <2>; + }; + + twsi1: i2c@10800 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10800 0x64>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apbc PXA1908_CLK_TWSI1>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + twsi0: i2c@11000 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11000 0x64>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apbc PXA1908_CLK_TWSI0>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + twsi3: i2c@13800 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x13800 0x64>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apbc PXA1908_CLK_TWSI3>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + apbc: clock-controller@15000 { + compatible = "marvell,pxa1908-apbc"; + reg = <0x15000 0x1000>; + #clock-cells = <1>; + }; + + uart0: serial@17000 { + compatible = "mrvl,mmp-uart"; + reg = <0x17000 0x1000>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma 21 1>, + <&pdma 22 1>; + dma-names = "rx", "tx"; + clocks = <&apbc PXA1908_CLK_UART0>; + }; + + uart1: serial@18000 { + compatible = "mrvl,mmp-uart"; + reg = <0x18000 0x1000>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma 23 1>, + <&pdma 24 1>; + dma-names = "rx", "tx"; + clocks = <&apbc PXA1908_CLK_UART1>; + }; + + gpio: gpio@19000 { + compatible = "marvell,mmp-gpio"; + reg = <0x19000 0x800>; + #address-cells = <1>; + #size-cells = <1>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&apbc PXA1908_CLK_GPIO>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gpio_mux"; + interrupt-controller; + #interrupt-cells = <2>; + ranges = <0 0x19000 0x800>; + + gpio@0 { + reg = <0x0 0x4>; + }; + + gpio@4 { + reg = <0x4 0x4>; + }; + + gpio@8 { + reg = <0x8 0x4>; + }; + + gpio@100 { + reg = <0x100 0x4>; + }; + }; + + pmx: pinmux@1e000 { + compatible = "pinconf-single"; + reg = <0x1e000 0x330>; + #address-cells = <1>; + #size-cells = <1>; + #gpio-range-cells = <3>; + ranges; + + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + }; + + uart2: serial@36000 { + compatible = "mrvl,mmp-uart"; + reg = <0x36000 0x1000>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma 4 1>, + <&pdma 5 1>; + dma-names = "rx", "tx"; + clocks = <&apbcp PXA1908_CLK_UART2>; + }; + + twsi2: i2c@37000 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x37000 0x64>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apbcp PXA1908_CLK_TWSI2>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + apbcp: clock-controller@3b000 { + compatible = "marvell,pxa1908-apbcp"; + reg = <0x3b000 0x1000>; + #clock-cells = <1>; + }; + + mpmu: clock-controller@50000 { + compatible = "marvell,pxa1908-mpmu"; + reg = <0x50000 0x1000>; + #clock-cells = <1>; + }; + }; + + axi@d4200000 { + compatible = "simple-bus"; + reg = <0 0xd4200000 0 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xd4200000 0x200000>; + + usbphy: phy@7000 { + compatible = "marvell,pxa1928-usb-phy"; + reg = <0x7000 0x200>; + clocks = <&apmu PXA1908_CLK_USB>; + #phy-cells = <0>; + }; + + usb: usb@8000 { + compatible = "chipidea,usb2"; + reg = <0x8000 0x200>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apmu PXA1908_CLK_USB>; + phys = <&usbphy>; + phy-names = "usb-phy"; + }; + + sdh0: mmc@80000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0x80000 0x120>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apmu PXA1908_CLK_SDH0>; + clock-names = "io"; + mrvl,clk-delay-cycles = <31>; + }; + + sdh1: mmc@80800 { + compatible = "mrvl,pxav3-mmc"; + reg = <0x80800 0x120>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apmu PXA1908_CLK_SDH1>; + clock-names = "io"; + mrvl,clk-delay-cycles = <31>; + }; + + sdh2: mmc@81000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0x81000 0x120>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apmu PXA1908_CLK_SDH2>; + clock-names = "io"; + mrvl,clk-delay-cycles = <31>; + }; + + apmu: clock-controller@82800 { + compatible = "marvell,pxa1908-apmu"; + reg = <0x82800 0x400>; + #clock-cells = <1>; + }; + }; + }; +}; -- 2.41.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 08/10] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte 2023-07-21 20:37 ` [PATCH 08/10] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte Duje Mihanović @ 2023-07-22 9:25 ` Krzysztof Kozlowski 0 siblings, 0 replies; 12+ messages in thread From: Krzysztof Kozlowski @ 2023-07-22 9:25 UTC (permalink / raw) To: Duje Mihanović, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kees Cook, Tony Luck, Guilherme G. Piccoli, devicetree, linux-kernel, linux-arm-kernel, linux-hardening Cc: ~postmarketos/upstreaming, phone-devel, afaerber On 21/07/2023 22:37, Duje Mihanović wrote: > Add DTS for Marvell PXA1908 SoC and Samsung Galaxy Core Prime Value > Edition LTE, a smartphone based on said SoC. > > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> > --- > arch/arm64/boot/dts/marvell/Makefile | 1 + > .../pxa1908-samsung-coreprimevelte.dts | 321 ++++++++++++++++++ > arch/arm64/boot/dts/marvell/pxa1908.dtsi | 298 ++++++++++++++++ > 3 files changed, 620 insertions(+) > create mode 100644 arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts > create mode 100644 arch/arm64/boot/dts/marvell/pxa1908.dtsi > > diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile > index 79ac09b58a89..0e277a0d368b 100644 > --- a/arch/arm64/boot/dts/marvell/Makefile > +++ b/arch/arm64/boot/dts/marvell/Makefile > @@ -27,3 +27,4 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb > dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb > dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb > dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb > +dtb-$(CONFIG_ARCH_MMP) += pxa1908-samsung-coreprimevelte.dtb > diff --git a/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts > new file mode 100644 > index 000000000000..3e10a77a106e > --- /dev/null > +++ b/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts > @@ -0,0 +1,321 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +#include "pxa1908.dtsi" > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/linux-event-codes.h> > + > +/ { > + pxa,rev-id = <3928 2>; Drop. This is not documented. It does not look like you tested the DTS against bindings. Please run `make dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). > + model = "Samsung Galaxy Core Prime VE LTE"; > + compatible = "samsung,coreprimevelte", "marvell,pxa1908"; Missing bindings. > + > + /* Bootloader fills this in */ > + memory { > + device_type = "memory"; > + reg = <0 0 0 0>; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + framebuffer@17000000 { > + reg = <0 0x17000000 0 0x1800000>; > + no-map; > + }; > + > + gpu@9000000 { > + reg = <0 0x9000000 0 0x1000000>; > + }; > + > + /* Communications processor, aka modem */ > + cp@3000000 { > + reg = <0 0x3000000 0 0x5000000>; > + }; > + > + cm3@a000000 { > + reg = <0 0xa000000 0 0x80000>; > + }; > + > + seclog@8000000 { > + reg = <0 0x8000000 0 0x100000>; > + }; > + > + ramoops@8100000 { > + compatible = "ramoops"; > + reg = <0 0x8100000 0 0x40000>; > + record-size = <0x8000>; > + console-size = <0x20000>; > + max-reason = <5>; > + }; > + }; > + > + fb0: framebuffer@17177000 { > + compatible = "simple-framebuffer"; > + reg = <0 0x17177000 0 (480 * 800 * 4)>; > + width = <480>; > + height = <800>; > + stride = <(480 * 4)>; > + format = "a8r8g8b8"; > + }; > + > + muic-i2c { > + compatible = "i2c-gpio"; > + sda-gpios = <&gpio 30 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; > + scl-gpios = <&gpio 29 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; > + i2c-gpio,delay-us = <3>; > + i2c-gpio,timeout-ms = <100>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&muic_i2c_pins>; > + > + muic: extcon@14 { > + compatible = "siliconmitus,sm5504-muic"; > + reg = <0x14>; > + interrupt-parent = <&gpio>; > + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gpio_keys_pins>; > + autorepeat; > + > + key-home { > + label = "Home"; > + linux,code = <KEY_HOME>; > + gpios = <&gpio 50 GPIO_ACTIVE_LOW>; > + }; > + > + key-volup { > + label = "Volume Up"; > + linux,code = <KEY_VOLUMEUP>; > + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; > + }; > + > + key-voldown { > + label = "Volume Down"; > + linux,code = <KEY_VOLUMEDOWN>; > + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; > + }; > + }; > + > + chosen {}; chosen is usually at the top (as alphabetical order suggests) > +}; > + > +&smmu { > + status = "okay"; > +}; > + > +&pmx { > + pinctrl-single,gpio-range = <&range 55 55 0>, > + <&range 110 32 0>, > + <&range 52 1 0>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&board_pins_1 &board_pins_2 &board_pins_3>; > + > + board_pins_1: pinmux_board_1 { No underscores in node names. ... > diff --git a/arch/arm64/boot/dts/marvell/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/pxa1908.dtsi > new file mode 100644 > index 000000000000..7131b2070b72 > --- /dev/null > +++ b/arch/arm64/boot/dts/marvell/pxa1908.dtsi > @@ -0,0 +1,298 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/dts-v1/; > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/clock/marvell,pxa1908.h> > + > +/ { > + model = "Marvell Armada PXA1908"; > + compatible = "marvell,pxa1908"; Undocumented compatible. Please run scripts/checkpatch.pl and fix reported warnings. Some warnings can be ignored, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC [not found] <20230721210042.21535-1-duje.mihanovic@skole.hr> ` (2 preceding siblings ...) 2023-07-21 20:37 ` [PATCH 08/10] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte Duje Mihanović @ 2023-07-21 20:37 ` Duje Mihanović 2023-07-21 22:28 ` Rob Herring 2023-07-22 9:27 ` Krzysztof Kozlowski 3 siblings, 2 replies; 12+ messages in thread From: Duje Mihanović @ 2023-07-21 20:37 UTC (permalink / raw) To: Duje Mihanović, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree, linux-kernel Cc: ~postmarketos/upstreaming, phone-devel, afaerber Add dt bindings and documentation for Marvell PXA1908 SoC. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> --- .../bindings/arm/marvell/marvell,pxa1908.yaml | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml new file mode 100644 index 000000000000..085d238129ad --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/pxa1908.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell PXA1908 Platforms + +maintainers: + - Duje Mihanović <duje.mihanovic@skole.hr> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - samsung,coreprimevelte + - const: marvell,pxa1908 + + pxa,rev-id: + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - items: + - description: Board ID + - description: Board revision + description: | + Some bootloaders use this property to determine whether the provided dt + blob is compatible with a specific device. For example, Samsung's S-Boot + is known to require this property. + +additionalProperties: false -- 2.41.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC 2023-07-21 20:37 ` [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC Duje Mihanović @ 2023-07-21 22:28 ` Rob Herring 2023-07-22 9:27 ` Krzysztof Kozlowski 1 sibling, 0 replies; 12+ messages in thread From: Rob Herring @ 2023-07-21 22:28 UTC (permalink / raw) To: Duje Mihanović Cc: Sebastian Hesselbarth, Krzysztof Kozlowski, Conor Dooley, Gregory Clement, Andrew Lunn, linux-kernel, Rob Herring, phone-devel, afaerber, linux-arm-kernel, devicetree, ~postmarketos/upstreaming On Fri, 21 Jul 2023 22:37:51 +0200, Duje Mihanović wrote: > Add dt bindings and documentation for Marvell PXA1908 SoC. > > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> > --- > .../bindings/arm/marvell/marvell,pxa1908.yaml | 33 +++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename $id: http://devicetree.org/schemas/arm/marvell/pxa1908.yaml file: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230721210042.21535-10-duje.mihanovic@skole.hr The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema. ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC 2023-07-21 20:37 ` [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC Duje Mihanović 2023-07-21 22:28 ` Rob Herring @ 2023-07-22 9:27 ` Krzysztof Kozlowski 2023-07-22 21:52 ` Duje Mihanović 2023-07-24 14:14 ` Rob Herring 1 sibling, 2 replies; 12+ messages in thread From: Krzysztof Kozlowski @ 2023-07-22 9:27 UTC (permalink / raw) To: Duje Mihanović, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree, linux-kernel Cc: ~postmarketos/upstreaming, phone-devel, afaerber On 21/07/2023 22:37, Duje Mihanović wrote: > Add dt bindings and documentation for Marvell PXA1908 SoC. > > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> > --- > .../bindings/arm/marvell/marvell,pxa1908.yaml | 33 +++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > > diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > new file mode 100644 > index 000000000000..085d238129ad > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml I suggest having one bindings file for all pxa platforms, not per one SoC. > @@ -0,0 +1,33 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/marvell/pxa1908.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell PXA1908 Platforms > + > +maintainers: > + - Duje Mihanović <duje.mihanovic@skole.hr> > + > +properties: > + $nodename: > + const: '/' > + compatible: > + oneOf: > + - items: > + - enum: > + - samsung,coreprimevelte > + - const: marvell,pxa1908 > + > + pxa,rev-id: Incorrect vendor prefix > + $ref: /schemas/types.yaml#/definitions/uint32-array > + oneOf: That's not oneOf, so just items: > + - items: > + - description: Board ID > + - description: Board revision > + description: | Best regards, Krzysztof ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC 2023-07-22 9:27 ` Krzysztof Kozlowski @ 2023-07-22 21:52 ` Duje Mihanović 2023-07-24 14:14 ` Rob Herring 1 sibling, 0 replies; 12+ messages in thread From: Duje Mihanović @ 2023-07-22 21:52 UTC (permalink / raw) To: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Rob Herring, Conor Dooley, linux-arm-kernel, devicetree, linux-kernel, Krzysztof Kozlowski, Lubomir Rintel Cc: ~postmarketos/upstreaming, phone-devel, afaerber Hi Krzysztof, > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > > I suggest having one bindings file for all pxa platforms, not per one SoC. I would need to coordinate this with Lubomir. > > + pxa,rev-id: > Incorrect vendor prefix Unfortunately, the non-free bootloader used by the coreprimevelte expects the rev-id property to be named exactly like that and will refuse to boot the kernel image at all otherwise. This restriction can be bypassed by chainloading U-Boot, which I wish to do eventually. Best regards, Duje ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC 2023-07-22 9:27 ` Krzysztof Kozlowski 2023-07-22 21:52 ` Duje Mihanović @ 2023-07-24 14:14 ` Rob Herring 2023-07-24 21:37 ` Duje Mihanović 1 sibling, 1 reply; 12+ messages in thread From: Rob Herring @ 2023-07-24 14:14 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Duje Mihanović, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree, linux-kernel, ~postmarketos/upstreaming, phone-devel, afaerber On Sat, Jul 22, 2023 at 11:27:21AM +0200, Krzysztof Kozlowski wrote: > On 21/07/2023 22:37, Duje Mihanović wrote: > > Add dt bindings and documentation for Marvell PXA1908 SoC. > > > > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> > > --- > > .../bindings/arm/marvell/marvell,pxa1908.yaml | 33 +++++++++++++++++++ > > 1 file changed, 33 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > > > > diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > > new file mode 100644 > > index 000000000000..085d238129ad > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml > > I suggest having one bindings file for all pxa platforms, not per one SoC. Or perhaps mirroring the new dts directory structure. PXA is really multiple families. This one is more aligned with MMP than the PXA2xx/3xx. Rob ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC 2023-07-24 14:14 ` Rob Herring @ 2023-07-24 21:37 ` Duje Mihanović 0 siblings, 0 replies; 12+ messages in thread From: Duje Mihanović @ 2023-07-24 21:37 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski Cc: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth, Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree, linux-kernel, ~postmarketos/upstreaming, phone-devel, afaerber On July 24, 2023 4:14:35 PM GMT+02:00, Rob Herring <robh@kernel.org> wrote: >On Sat, Jul 22, 2023 at 11:27:21AM +0200, Krzysztof Kozlowski wrote: >> On 21/07/2023 22:37, Duje Mihanović wrote: >> > Add dt bindings and documentation for Marvell PXA1908 SoC. >> > >> > Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> >> > --- >> > .../bindings/arm/marvell/marvell,pxa1908.yaml | 33 +++++++++++++++++++ >> > 1 file changed, 33 insertions(+) >> > create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml >> > >> > diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml >> > new file mode 100644 >> > index 000000000000..085d238129ad >> > --- /dev/null >> > +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml >> >> I suggest having one bindings file for all pxa platforms, not per one SoC. > >Or perhaps mirroring the new dts directory structure. PXA is really >multiple families. This one is more aligned with MMP than the >PXA2xx/3xx. > >Rob > ^ permalink raw reply [flat|nested] 12+ messages in thread
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[not found] <20230721210042.21535-1-duje.mihanovic@skole.hr>
2023-07-21 20:37 ` [PATCH 05/10] dt-bindings: clock: Add Marvell PXA1908 clock bindings Duje Mihanović
2023-07-22 9:21 ` Krzysztof Kozlowski
2023-07-21 20:37 ` [PATCH 06/10] dt-bindings: clock: Add documentation for Marvell PXA1908 Duje Mihanović
2023-07-22 9:23 ` Krzysztof Kozlowski
2023-07-21 20:37 ` [PATCH 08/10] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte Duje Mihanović
2023-07-22 9:25 ` Krzysztof Kozlowski
2023-07-21 20:37 ` [PATCH 09/10] dt-bindings: marvell: Document PXA1908 SoC Duje Mihanović
2023-07-21 22:28 ` Rob Herring
2023-07-22 9:27 ` Krzysztof Kozlowski
2023-07-22 21:52 ` Duje Mihanović
2023-07-24 14:14 ` Rob Herring
2023-07-24 21:37 ` Duje Mihanović
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