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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id hz11-20020a1709072ceb00b00722fc014e8csm7575004ejc.104.2022.06.29.04.45.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Jun 2022 04:46:00 -0700 (PDT) Message-ID: Date: Wed, 29 Jun 2022 13:45:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH 1/4] dt-bindings: misc: tmr-manager: Add device-tree binding for TMR Manager Content-Language: en-US To: Michal Simek , Appana Durga Kedareswara rao , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, michal.simek@xilinx.com, derek.kiernan@xilinx.com, dragan.cvetic@xilinx.com, arnd@arndb.de, gregkh@linuxfoundation.org, linux-arm-kernel@lists.infradead.org Cc: git@amd.com, git@xilinx.com References: <20220628054338.1631516-1-appana.durga.rao@xilinx.com> <20220628054338.1631516-2-appana.durga.rao@xilinx.com> <6f5a1b1e-b484-3a15-00be-2c1ddc09468e@amd.com> From: Krzysztof Kozlowski In-Reply-To: <6f5a1b1e-b484-3a15-00be-2c1ddc09468e@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 29/06/2022 13:23, Michal Simek wrote: > > > On 6/29/22 12:07, Krzysztof Kozlowski wrote: >> On 28/06/2022 07:43, Appana Durga Kedareswara rao wrote: >>> This commit adds documentation for Triple Modular Redundancy(TMR) Manager >>> IP. The Triple Modular Redundancy(TMR) Manager is responsible for handling >>> the TMR subsystem state, including fault detection and error recovery >>> provides soft error detection, correction and recovery features. >>> >>> Signed-off-by: Appana Durga Kedareswara rao >>> --- >>> .../bindings/misc/xlnx,tmr-manager.yaml | 48 +++++++++++++++++++ >> >> This is not a misc device. Find appropriate subsystem for it. It's not >> EDAC, right? > > We were thinking where to put it but it is not EDAC driver. > If you have better suggestion for subsystem please let us know. I don't know what's the device about. The description does not help: "TMR Manager is responsible for TMR subsystem state..." > >> >>> 1 file changed, 48 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml b/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml >>> new file mode 100644 >>> index 000000000000..f6cb4d235981 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml >>> @@ -0,0 +1,48 @@ >>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Xilinx TMR Microblaze Device Tree Bindings >> >> s/Device Tree Bindings// >> >>> + >>> +maintainers: >>> + - Appana Durga Kedareswara rao >>> + >>> +description: | >>> + The Triple Modular Redundancy(TMR) Manager is responsible for handling the >>> + TMR subsystem state, including fault detection and error recovery. The core >>> + is triplicated in each of the sub-blocks in the TMR subsystem, and provides >>> + majority voting of its internal state. >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - xlnx,tmr-manager-1.0 >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + xlnx,magic1: >>> + minimum: 0 >>> + maximum: 255 >>> + description: >>> + Magic number 1, When writing to the control register the first write data >>> + byte (bits 7:0) must match this value in order to have any effect on the >>> + nominal recovery function. >> >> Register values are usually not in the scope of bindings. We describe >> here hardware, not programming model, although in case of soft cores >> maybe it's a bit different. > > you need to setup this value for every instance in design tools and it is > directly present in HW. It means this value is really describing HW. OK, thanks for clarification. Best regards, Krzysztof