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From: Matthias Brugger <matthias.bgg@gmail.com>
To: Chuanjia Liu <chuanjia.liu@mediatek.com>,
	lorenzo.pieralisi@arm.com, robh+dt@kernel.org,
	bhelgaas@google.com
Cc: ryder.lee@mediatek.com, jianjun.wang@mediatek.com,
	yong.wu@mediatek.com, linux-pci@vger.kernel.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v10 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node
Date: Tue, 13 Jul 2021 13:32:28 +0200	[thread overview]
Message-ID: <e462d9f0-2fa3-6106-f060-9753dc604b9f@gmail.com> (raw)
In-Reply-To: <20210611060902.12418-3-chuanjia.liu@mediatek.com>



On 11/06/2021 08:09, Chuanjia Liu wrote:
> For the new dts format, add a new method to get
> shared pcie-cfg base address and parse node.
> 
> Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
> Acked-by: Ryder Lee <ryder.lee@mediatek.com>

You missed the
Reviewed-by: Rob Herring <robh@kernel.org>
given in v8. Or were there any substantial changes in this patch?

> ---
>  drivers/pci/controller/pcie-mediatek.c | 52 +++++++++++++++++++-------
>  1 file changed, 39 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
> index 62a042e75d9a..950f577a2f44 100644
> --- a/drivers/pci/controller/pcie-mediatek.c
> +++ b/drivers/pci/controller/pcie-mediatek.c
> @@ -14,6 +14,7 @@
>  #include <linux/irqchip/chained_irq.h>
>  #include <linux/irqdomain.h>
>  #include <linux/kernel.h>
> +#include <linux/mfd/syscon.h>
>  #include <linux/msi.h>
>  #include <linux/module.h>
>  #include <linux/of_address.h>
> @@ -23,6 +24,7 @@
>  #include <linux/phy/phy.h>
>  #include <linux/platform_device.h>
>  #include <linux/pm_runtime.h>
> +#include <linux/regmap.h>
>  #include <linux/reset.h>
>  
>  #include "../pci.h"
> @@ -207,6 +209,7 @@ struct mtk_pcie_port {
>   * struct mtk_pcie - PCIe host information
>   * @dev: pointer to PCIe device
>   * @base: IO mapped register base
> + * @cfg: IO mapped register map for PCIe config
>   * @free_ck: free-run reference clock
>   * @mem: non-prefetchable memory resource
>   * @ports: pointer to PCIe port information
> @@ -215,6 +218,7 @@ struct mtk_pcie_port {
>  struct mtk_pcie {
>  	struct device *dev;
>  	void __iomem *base;
> +	struct regmap *cfg;
>  	struct clk *free_ck;
>  
>  	struct list_head ports;
> @@ -650,7 +654,11 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
>  		return err;
>  	}
>  
> -	port->irq = platform_get_irq(pdev, port->slot);
> +	if (of_find_property(dev->of_node, "interrupt-names", NULL))
> +		port->irq = platform_get_irq_byname(pdev, "pcie_irq");
> +	else
> +		port->irq = platform_get_irq(pdev, port->slot);
> +

Do I understand that this is used for backwards compatibility with older DTS? I
just wonder why we don't need to mandate
interrupt-names = "pcie_irq"
in the binding description.

Regards,
Matthias

  reply	other threads:[~2021-07-13 11:32 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-11  6:08 [PATCH v10 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design Chuanjia Liu
2021-06-11  6:08 ` [PATCH v10 1/4] dt-bindings: PCI: mediatek: Update the Device tree bindings Chuanjia Liu
2021-06-30  5:54   ` Chuanjia Liu
2021-06-11  6:09 ` [PATCH v10 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node Chuanjia Liu
2021-07-13 11:32   ` Matthias Brugger [this message]
2021-07-14 10:30     ` Chuanjia Liu
2021-06-11  6:09 ` [PATCH v10 3/4] arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 Chuanjia Liu
2021-06-11  6:09 ` [PATCH v10 4/4] ARM: dts: mediatek: Update MT7629 PCIe node for new format Chuanjia Liu

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