From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACD3B79D1; Wed, 27 Dec 2023 18:35:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kHi3CflK" Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-50e77a2805fso2376662e87.1; Wed, 27 Dec 2023 10:35:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1703702102; x=1704306902; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=uXclIxtXqPFsxy0XcvgnkjbTaVqZ7ItIisfYtSYDS1c=; b=kHi3CflKM6SVna5I5t49OlfGJdUmA5oMbD4sB1vIkUZ0ZTLCxFcyOR3dUH3IPLelmZ NLvg+axbePx5zhps0a2H4nB3/eKFbxxUuwZVDNZIjkDoIQwKFSKc/+p9n2e+5hV7CtWT 3Wy/zi0L6qOLvvzNAPeAOJjK9QBQzDkeWP3QHxvxJNT7NLoj+2Tlhm9d/X0m82OG/Alx W9jzvJh7OObmVil2aFdQTIDokXD3pl7TBZBElecCaAqFwj97Soz2gIEeUBeJ7v2jHTDV sAKwdrvOQYJtHUCoO3w095WrxDAr5/e4f0y1hMSUj+MckZi0+VFnolmhLi/j1ajbW9Mf D+EA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703702102; x=1704306902; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=uXclIxtXqPFsxy0XcvgnkjbTaVqZ7ItIisfYtSYDS1c=; b=cldyZROXw7IYcrKVBChua98PPL0n47d8guvErio8xfPGw+FrNLEt9pkrkqnIAivnij WkOdhCkAabkI08gw73KCYExfhOLGulbUp/iuep4paITdJzGd0l9Cmc4puXqEebJl6K+0 MZ39b7wOvCZ/QfmHzPdtNW2nibgHwxNrNR17ptXC1RYv6faqiZUZeqCSXup344w1EFtz C2Ih/hAgwFM5SUIcm6Ta9yT+kb4XpnBhxuYo5Vr5eLHf69wydPDigiwCEkdLzTv3Ddx5 ajjVUS/04uFjWJ7m980ntk6Hs53keh6nXH2/k0KdIlw8z7oUMVsPKh38zh7E8Rt+dN6P XghA== X-Gm-Message-State: AOJu0YwqrYMgEP0uAXIvc+yK52z0WEcniOB9FHoqatBIQHQngkomA8nT g9KtclfF5L/XpEi2mnFVMdY= X-Google-Smtp-Source: AGHT+IH/k14PlGDeotzMdGS8xHWTW9jDPbn5jpOPQlVxRngTKRtmbxvDSi/JGWhXBWofq4h2p8TNbg== X-Received: by 2002:a05:6512:b19:b0:50e:8487:1ec9 with SMTP id w25-20020a0565120b1900b0050e84871ec9mr797767lfu.39.1703702101347; Wed, 27 Dec 2023 10:35:01 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id fv14-20020a170907508e00b00a269f8e8869sm6731515ejc.128.2023.12.27.10.35.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Dec 2023 10:35:00 -0800 (PST) Message-ID: Date: Wed, 27 Dec 2023 19:34:59 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 From: Johan Jonker Subject: [PATCH v3 2/2] arm64: dts: rockchip: add gpio-ranges property to gpio nodes To: heiko@sntech.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, kever.yang@rock-chips.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Add a gpio-ranges property to Rockchip gpio nodes similar to rk356x/rk3588 to be independent from aliases and probe order. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang --- Changed V3: reword remove rk356x part --- arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ 5 files changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index d0905515399b..27d045296388 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1394,6 +1394,7 @@ gpio0: gpio@ff040000 { interrupts = ; clocks = <&pmucru PCLK_GPIO0_PMU>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -1406,6 +1407,7 @@ gpio1: gpio@ff250000 { interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -1418,6 +1420,7 @@ gpio2: gpio@ff260000 { interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -1430,6 +1433,7 @@ gpio3: gpio@ff270000 { interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index cfc0a87b5195..09fda512c101 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -804,6 +804,7 @@ gpio0: gpio@ff220000 { interrupts = ; clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -815,6 +816,7 @@ gpio1: gpio@ff230000 { interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -826,6 +828,7 @@ gpio2: gpio@ff240000 { interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -837,6 +840,7 @@ gpio3: gpio@ff250000 { interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -848,6 +852,7 @@ gpio4: gpio@ff260000 { interrupts = ; clocks = <&cru PCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index fb5dcf6e9327..2cead2e85c07 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1058,6 +1058,7 @@ gpio0: gpio@ff210000 { clocks = <&cru PCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; @@ -1071,6 +1072,7 @@ gpio1: gpio@ff220000 { clocks = <&cru PCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; @@ -1084,6 +1086,7 @@ gpio2: gpio@ff230000 { clocks = <&cru PCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; @@ -1097,6 +1100,7 @@ gpio3: gpio@ff240000 { clocks = <&cru PCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 62af0cb94839..2a017c862263 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -987,6 +987,7 @@ gpio0: gpio@ff750000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -1000,6 +1001,7 @@ gpio1: gpio@ff780000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -1013,6 +1015,7 @@ gpio2: gpio@ff790000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -1026,6 +1029,7 @@ gpio3: gpio@ff7a0000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <0x2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 6e12c5a920ca..206f7d54d4d0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2138,6 +2138,7 @@ gpio0: gpio@ff720000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2151,6 +2152,7 @@ gpio1: gpio@ff730000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2164,6 +2166,7 @@ gpio2: gpio@ff780000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2177,6 +2180,7 @@ gpio3: gpio@ff788000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <0x2>; interrupt-controller; @@ -2190,6 +2194,7 @@ gpio4: gpio@ff790000 { interrupts = ; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <0x2>; interrupt-controller; -- 2.39.2