From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Ryan.Wanner@microchip.com, andrew+netdev@lunn.ch,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org,
onor+dt@kernel.org, alexandre.belloni@bootlin.com
Cc: nicolas.ferre@microchip.com, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 3/6] ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
Date: Fri, 11 Apr 2025 17:29:01 +0300 [thread overview]
Message-ID: <e59df78d-6dcb-430a-bec5-c1e47f3b3b55@tuxon.dev> (raw)
In-Reply-To: <d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com>
Hi, Ryan,
On 01.04.2025 19:13, Ryan.Wanner@microchip.com wrote:
> From: Ryan Wanner <Ryan.Wanner@microchip.com>
>
> Add FLEXCOMs to the SAMA7D65 SoC device tree.
>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> arch/arm/boot/dts/microchip/sama7d65.dtsi | 267 ++++++++++++++++++++++
> 1 file changed, 267 insertions(+)
>
> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> index cd17b838e179..9f453c686dc6 100644
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -217,6 +217,199 @@ pit64b1: timer@e1804000 {
> clock-names = "pclk", "gclk";
> };
>
> + flx0: flexcom@e1820000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe1820000 0x200>;
> + ranges = <0x0 0xe1820000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + uart0: serial@200 {
> + compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
> + clock-names = "usart";
> + dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
> + <&dma1 AT91_XDMAC_DT_PERID(5)>;
This here ^ should be aligned with the "<" on
the previous line.
Same for the rest of dmas on this file.
> + dma-names = "tx", "rx";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
> + status = "disabled";
> + };
> +
> + i2c0: i2c@600 {
> + compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(6)>,
> + <&dma0 AT91_XDMAC_DT_PERID(5)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> + };
> +
> + flx1: flexcom@e1824000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe1824000 0x200>;
> + ranges = <0x0 0xe1824000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + spi1: spi@400 {
> + compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
> + clock-names = "spi_clk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
Vendor specific properties should be placed at the end of the node.
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
> + <&dma0 AT91_XDMAC_DT_PERID(7)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> + i2c1: i2c@600 {
> + compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
> + <&dma0 AT91_XDMAC_DT_PERID(7)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> + };
> +
> + flx2: flexcom@e1828000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe1828000 0x200>;
> + ranges = <0x0 0xe1828000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + uart2: serial@200 {
> + compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
> + clock-names = "usart";
> + dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>,
> + <&dma1 AT91_XDMAC_DT_PERID(9)>;
> + dma-names = "tx", "rx";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
> + status = "disabled";
> + };
> + };
> +
> + flx3: flexcom@e182c000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe182c000 0x200>;
> + ranges = <0x0 0xe182c000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + i2c3: i2c@600 {
> + compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
> + <&dma0 AT91_XDMAC_DT_PERID(11)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> + };
> +
> + flx4: flexcom@e2018000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe2018000 0x200>;
> + ranges = <0x0 0xe2018000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + uart4: serial@200 {
> + compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
> + clock-names = "usart";
> + dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
> + <&dma1 AT91_XDMAC_DT_PERID(13)>;
> + dma-names = "tx", "rx";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
> + status = "disabled";
> + };
> +
> + spi4: spi@400 {
> + compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
> + clock-names = "spi_clk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>,
> + <&dma0 AT91_XDMAC_DT_PERID(13)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> + };
> +
> + flx5: flexcom@e201c000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe201c000 0x200>;
> + ranges = <0x0 0xe201c000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + i2c5: i2c@600 {
> + compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>,
> + <&dma0 AT91_XDMAC_DT_PERID(15)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> + };
> +
> flx6: flexcom@e2020000 {
> compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> reg = <0xe2020000 0x200>;
> @@ -238,6 +431,80 @@ uart6: serial@200 {
> };
> };
>
> + flx7: flexcom@e2024000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe2024000 0x200>;
> + ranges = <0x0 0xe2024000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + uart7: serial@200 {
> + compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
> + clock-names = "usart";
> + dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
> + <&dma1 AT91_XDMAC_DT_PERID(19)>;
> + dma-names = "tx", "rx";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
> + status = "disabled";
> + };
> + };
> +
> + flx8: flexcom@e281c000{
Missing space here -------------------^
As these are mainly cosmetics I will adjust while applying.
Thank you,
Claudiu
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe281c000 0x200>;
> + ranges = <0x0 0xe281c000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + i2c8: i2c@600 {
> + compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
> + <&dma0 AT91_XDMAC_DT_PERID(21)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> + };
> +
> + flx9: flexcom@e2820000 {
> + compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> + reg = <0xe2820000 0x200>;
> + ranges = <0x0 0xe281c000 0x800>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
> + i2c9: i2c@600 {
> + compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,fifo-size = <32>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
> + <&dma0 AT91_XDMAC_DT_PERID(23)>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> + };
> +
> flx10: flexcom@e2824000 {
> compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
> reg = <0xe2824000 0x200>;
next prev parent reply other threads:[~2025-04-11 14:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-01 16:13 [PATCH 0/6] Enable FLEXCOMs and GMAC for SAMA7D65 SoC Ryan.Wanner
2025-04-01 16:13 ` [PATCH 1/6] dt-bindings: net: cdns,macb: add sama7d65 ethernet interface Ryan.Wanner
2025-04-02 0:54 ` Jakub Kicinski
2025-04-02 13:28 ` Conor Dooley
2025-04-01 16:13 ` [PATCH 2/6] ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC Ryan.Wanner
2025-04-01 16:13 ` [PATCH 3/6] ARM: dts: microchip: sama7d65: Add FLEXCOMs to " Ryan.Wanner
2025-04-11 14:29 ` Claudiu Beznea [this message]
2025-04-01 16:13 ` [PATCH 4/6] ARM: dts: microchip: sama7d65: Enable GMAC interface Ryan.Wanner
2025-04-11 14:29 ` Claudiu Beznea
2025-04-01 16:13 ` [PATCH 5/6] ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity Ryan.Wanner
2025-04-11 14:30 ` Claudiu Beznea
2025-04-14 15:38 ` Ryan.Wanner
2025-04-27 13:43 ` Claudiu Beznea
2025-04-01 16:13 ` [PATCH 6/6] ARM: dts: microchip: sama7d65_curiosity: add EEPROM Ryan.Wanner
2025-04-27 13:44 ` [PATCH 0/6] Enable FLEXCOMs and GMAC for SAMA7D65 SoC Claudiu Beznea
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