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[83.9.30.37]) by smtp.gmail.com with ESMTPSA id g3-20020a1709067c4300b007c0a7286ac8sm18494294ejp.69.2023.01.20.13.22.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Jan 2023 13:22:27 -0800 (PST) Message-ID: Date: Fri, 20 Jan 2023 22:22:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH v6 1/2] arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIs Content-Language: en-US To: Melody Olvera , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230112210722.6234-1-quic_molvera@quicinc.com> <20230112210722.6234-2-quic_molvera@quicinc.com> From: Konrad Dybcio In-Reply-To: <20230112210722.6234-2-quic_molvera@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 12.01.2023 22:07, Melody Olvera wrote: > Add the base DTSI files for QDU1000 and QRU1000 SoCs, including base > descriptions of CPUs, GCC, RPMHCC, QUP, TLMM, and interrupt-controller > to boot to shell with console on these SoCs. > > Signed-off-by: Melody Olvera > --- [...] > + > + arch_timer: timer { Unused label Otherwise: Reviewed-by: Konrad Dybcio Konrad > + compatible = "arm,armv8-timer"; > + interrupts = , > + , > + , > + , > + ; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/qru1000.dtsi b/arch/arm64/boot/dts/qcom/qru1000.dtsi > new file mode 100644 > index 000000000000..eac5dc54a8ab > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qru1000.dtsi > @@ -0,0 +1,26 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include "qdu1000.dtsi" > +/delete-node/ &tenx_mem; > +/delete-node/ &oem_tenx_mem; > +/delete-node/ &tenx_q6_buffer_mem; > + > +&reserved_memory { > + oem_tenx_mem: oem-tenx@a0000000 { > + reg = <0x0 0xa0000000 0x0 0x6400000>; > + no-map; > + }; > + > + mpss_diag_buffer_mem: mpss-diag-buffer@aea00000 { > + reg = <0x0 0xaea00000 0x0 0x6400000>; > + no-map; > + }; > + > + tenx_q6_buffer_mem: tenx-q6-buffer@b4e00000 { > + reg = <0x0 0xb4e00000 0x0 0x3200000>; > + no-map; > + }; > +};