From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: magnus.damm@gmail.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
mturquette@baylibre.com, sboyd@kernel.org,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 5/6] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1
Date: Fri, 13 Oct 2023 08:51:25 +0300 [thread overview]
Message-ID: <e678ef3a-0f84-4ea2-9116-a661b91b2e32@tuxon.dev> (raw)
In-Reply-To: <CAMuHMdW+5MZXRbDtZtmrMkrCtwqqKUcW_W1_5U_2yO6w6aCa_w@mail.gmail.com>
On 12.10.2023 17:44, Geert Uytterhoeven wrote:
> Hi Claudiu,
>
> On Tue, Oct 10, 2023 at 3:27 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> Add SDHI1 to RZ/G3S Smarc Carrier-II board. This is connected to a uSD
>> interface. Although Vccq doesn't cross the boundary of SoM it has
>> been added to RZ/G3S Smarc Carrier-II dtsi to have all the bits related to
>> SDHI1 in a single place. At the moment SoM is used only with RZ/G3S Smarc
>> Carrier-II board.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Thanks for your patch!
>
>> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
>> @@ -11,6 +11,27 @@
>> / {
>> aliases {
>> serial0 = &scif0;
>> + mmc1 = &sdhi1;
>> + };
>> +
>> + /* Reserved regulators 0-9 for SoM. */
>> + vcc_sdhi1: regulator10 {
>
> You can use sensible names for the regulators to avoid conflicts.
> E.g. "regulator-vcc-sdhi1".
OK, I'm aware of that, I'll use it like this in the next version.
Thank you,
Claudiu Beznea
>
> The rest LGTM.
>
> Gr{oetje,eeting}s,
>
> Geert
>
next prev parent reply other threads:[~2023-10-13 5:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-10 13:26 [PATCH 0/6] arm64: dts: renesas: Add SDHI1 and SDHI2 for RZ/G3S Claudiu
2023-10-10 13:26 ` [PATCH 1/6] clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R() Claudiu
2023-10-10 14:52 ` Sergei Shtylyov
2023-10-11 7:36 ` claudiu beznea
2023-10-11 7:43 ` Geert Uytterhoeven
2023-10-11 15:55 ` claudiu beznea
2023-10-12 12:37 ` Geert Uytterhoeven
2023-10-10 13:26 ` [PATCH 2/6] clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2 Claudiu
2023-10-12 13:22 ` Geert Uytterhoeven
2023-10-10 13:26 ` [PATCH 3/6] arm64: dts: renesas: r9a08g045: Add nodes " Claudiu
2023-10-12 13:35 ` Geert Uytterhoeven
2023-10-10 13:26 ` [PATCH 4/6] arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2 Claudiu
2023-10-12 14:36 ` Geert Uytterhoeven
2023-10-13 5:45 ` claudiu beznea
2023-10-10 13:27 ` [PATCH 5/6] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1 Claudiu
2023-10-12 14:44 ` Geert Uytterhoeven
2023-10-13 5:51 ` claudiu beznea [this message]
2023-10-10 13:27 ` [PATCH 6/6] arm64: dts: renesas: rzg3s: Fix dtbs_check Claudiu
2023-10-12 14:49 ` Geert Uytterhoeven
2023-10-13 5:55 ` claudiu beznea
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