From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C699F443E44; Tue, 21 Jul 2026 22:16:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784672201; cv=none; b=YyCOc9JuXNnd1awMK4Pjqp96YlPGEcLkR2Xx/APoZ5ea5j+eyVwbqtTaJPQqbqtTRJL+JiZiKM2we334c6QP66eMDgYwPVW43zk3EJHEVROWon6sMIj6LsW8v0MDoMOrB0EJcnaYw0na5ViEhOuyrzq18LMRoAaGXapLt3WQI4k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784672201; c=relaxed/simple; bh=WyzqSykE73WG2LXx72bjVhe31Vg614ZIpRj9HsbQAps=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=jVxG9iYnkwBiKAw11th782jlL7m4WUoK4No8N5y3KUa8U55aUOHhUGvPlPO1U8ndXsm0+B8zt3WcTu/DWq2Q6VC0cmliSkxRbsgyy8r3XEOXz6tbIt9b39hePdb0rsynMzRuZLwgmd+0TxBMFapiy+ZaajJ9MUk2RdhhkwpUbWc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OL3RFqDT; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OL3RFqDT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C047B1F00A3A; Tue, 21 Jul 2026 22:16:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784672200; bh=QDDAanHu/gGM/wyr/cAnZkKIwgBEHbVsJiB/kzlamE0=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=OL3RFqDTsxNmkXykXwXAXs68iZvWSBGPBkX9k+rbywq/5L//BzK3k+w+0x/4jpNV8 m8h2gjd6PZPQWlz9/iQm4ru4ukwe9aE445iN0aJAo7M4DU/V1D0I+gNlnYf34dwhfl kLuXZh8q3+JhSW0yfU5GiKbDFwfr19oE3pvEX88bBDoYPueDCIDAuWi5VLrGMFWhwq qaE0AHQYWLAN09/bNWs4N1SawlHIDa3hU1v6cT8gsz5Rx5UIxlVvAhU2oEd3oENT1q +qCE5mGUXoeU0rh2tb4NyS/ZylQhFuuQJjCT8mfK07RkCoMQHOSgAORcrNfipXsAc9 tr27uyujLQn5w== Message-ID: Date: Tue, 21 Jul 2026 23:16:36 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 04/18] media: iris: Filter UBWC raw formats based on hardware capabilities To: Vikash Garodia , Dmitry Baryshkov Cc: Abhinav Kumar , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vishnu Reddy , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Dikshita Agarwal References: <20260709-iris-ar50lt-v7-0-76af9dd4d1f6@oss.qualcomm.com> <20260709-iris-ar50lt-v7-4-76af9dd4d1f6@oss.qualcomm.com> <5d213d08-8e00-4e7e-93ae-ba05f22f09e7@oss.qualcomm.com> <2323abe7-ecd3-4504-8790-ef1a2dacec8f@oss.qualcomm.com> From: Bryan O'Donoghue Content-Language: en-GB Autocrypt: addr=bod@kernel.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 21/07/2026 17:23, Vikash Garodia wrote: > > On 7/21/2026 8:34 PM, Dmitry Baryshkov wrote: >> On Tue, 21 Jul 2026 at 17:08, Vikash Garodia >> wrote: >>> >>> >>> On 7/9/2026 7:11 PM, Dmitry Baryshkov wrote: >>>> From: Dikshita Agarwal >>>> >>>> The raw formats supported by Iris were previously advertised >>>> unconditionally, assuming UBWC support on all platforms. However, some >>>> platforms do not support UBWC which results in incorrect format >>>> capability exposure. >>>> >>>> Use the UBWC configuration provided by the platform to dynamically >>>> filter raw formats at runtime. If UBWC is not supported, UBWC-based >>>> formats are omitted from the advertised capability list, while linear >>>> formats remain available. >>>> >>>> Signed-off-by: Dikshita Agarwal >>>> Signed-off-by: Dmitry Baryshkov >>>> --- >>>> drivers/media/platform/qcom/iris/iris_vdec.c | 26 ++++++++++++++++++++++---- >>>> drivers/media/platform/qcom/iris/iris_venc.c | 25 +++++++++++++++++++++---- >>>> 2 files changed, 43 insertions(+), 8 deletions(-) >>>> >>>> diff --git a/drivers/media/platform/qcom/iris/iris_vdec.c b/drivers/media/platform/qcom/iris/iris_vdec.c >>>> index 4c8bc7aac135..9fee5f28097d 100644 >>>> --- a/drivers/media/platform/qcom/iris/iris_vdec.c >>>> +++ b/drivers/media/platform/qcom/iris/iris_vdec.c >>>> @@ -3,6 +3,7 @@ >>>> * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. >>>> */ >>>> >>>> +#include >>>> #include >>>> #include >>>> >>>> @@ -69,8 +70,14 @@ static const u32 iris_vdec_formats_cap[] = { >>>> V4L2_PIX_FMT_QC10C, >>>> }; >>>> >>>> +static const u32 iris_vdec_formats_noubwc_cap[] = { >>>> + V4L2_PIX_FMT_NV12, >>>> + V4L2_PIX_FMT_P010, >>>> +}; >>>> + >>>> static bool check_format(struct iris_inst *inst, u32 pixfmt, u32 type) >>>> { >>>> + const struct qcom_ubwc_cfg_data *ubwc = inst->core->ubwc_cfg; >>>> unsigned int size, i; >>>> const u32 *fmt; >>>> >>>> @@ -80,8 +87,13 @@ static bool check_format(struct iris_inst *inst, u32 pixfmt, u32 type) >>>> size = inst->core->iris_platform_data->inst_iris_fmts_size; >>>> break; >>>> case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: >>>> - fmt = iris_vdec_formats_cap; >>>> - size = ARRAY_SIZE(iris_vdec_formats_cap); >>>> + if (ubwc->ubwc_enc_version) { >>> >>> Do you see a possibility that ubwc is enabled for a SOC while VPU >>> hardware does not support UBWC. IP document for qcom,qcm2290 lists some >>> UBWC configuration, while VPU does not support UBWC. Not sure at this >>> point if other blocks indeed support UBWC for qcom,qcm2290. >> >> No, QCM2290 doesn't really support UBWC between the IP cores (as such >> it has ubwc_enc_version = 0). >> Currently the database defines a least common denominator for all IP >> cores. If we ever get to a point where we want to define UBWC params >> per the core, we will need to restructure the database. >> > > Ack. > > Ack-by ? --- bod