From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Binbin Zhou <zhoubinbin@loongson.cn>,
Binbin Zhou <zhoubb.aaron@gmail.com>,
Huacai Chen <chenhuacai@loongson.cn>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: Huacai Chen <chenhuacai@kernel.org>,
loongson-kernel@lists.loongnix.cn,
Xuerui Wang <kernel@xen0n.name>,
loongarch@lists.linux.dev, Jiaxun Yang <jiaxun.yang@flygoat.com>,
Hongliang Wang <wanghongliang@loongson.cn>
Subject: Re: [PATCH v3 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500
Date: Tue, 22 Aug 2023 08:22:56 +0200 [thread overview]
Message-ID: <e6d4a3e2-0de4-2d85-da05-e695aed05223@linaro.org> (raw)
In-Reply-To: <b8749ca4c76fd2584e6c9c8504cf44ee66eb0a20.1692618548.git.zhoubinbin@loongson.cn>
On 21/08/2023 14:49, Binbin Zhou wrote:
> Add DeviceTree file for Loongson-2K0500 processor, which integrates one
> 64-bit dual emission superscalar LA264 processor core.
>
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> ---
> arch/loongarch/boot/dts/Makefile | 2 +
> .../boot/dts/loongson-2k0500-ref.dts | 88 ++++++
> arch/loongarch/boot/dts/loongson-2k0500.dtsi | 254 ++++++++++++++++++
> 3 files changed, 344 insertions(+)
> create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts
> create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
>
> diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile
> index 1e24cdb5180a..aa0b21d73d4e 100644
> --- a/arch/loongarch/boot/dts/Makefile
> +++ b/arch/loongarch/boot/dts/Makefile
> @@ -1,3 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0-only
>
> +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb
> +
> obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
> diff --git a/arch/loongarch/boot/dts/loongson-2k0500-ref.dts b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts
> new file mode 100644
> index 000000000000..5014cc2b367a
> --- /dev/null
> +++ b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts
> @@ -0,0 +1,88 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Loongson Technology Corporation Limited
> + */
> +
> +/dts-v1/;
> +
> +#include "loongson-2k0500.dtsi"
> +
> +/ {
> + compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
> + model = "Loongson-2K0500 Reference Board";
> +
> + aliases {
> + ethernet0 = &gmac0;
> + ethernet1 = &gmac1;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@200000 {
> + device_type = "memory";
> + reg = <0x0 0x200000 0x0 0xee00000>, /* 238 MB at 2 MB */
> + <0x0 0x90000000 0x0 0x60000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + linux,cma {
> + compatible = "shared-dma-pool";
> + reusable;
> + size = <0x0 0x2000000>;
> + linux,cma-default;
> + };
> + };
> +};
> +
> +&gmac0 {
> + status = "okay";
> +
> + phy-mode = "rgmii";
> + bus_id = <0x0>;
> +};
> +
> +&gmac1 {
> + status = "okay";
> +
> + phy-mode = "rgmii";
> + bus_id = <0x1>;
> +};
> +
> +&i2c0 {
> + status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + eeprom@57{
> + compatible = "atmel,24c16";
> + reg = <0x57>;
> + pagesize = <16>;
> + };
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&ohci0 {
> + status = "okay";
> +};
> +
> +&sata {
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&rtc0 {
> + status = "okay";
> +};
> diff --git a/arch/loongarch/boot/dts/loongson-2k0500.dtsi b/arch/loongarch/boot/dts/loongson-2k0500.dtsi
> new file mode 100644
> index 000000000000..b45d1c217a6c
> --- /dev/null
> +++ b/arch/loongarch/boot/dts/loongson-2k0500.dtsi
> @@ -0,0 +1,254 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Loongson Technology Corporation Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> + };
> + };
> +
> + cpu0: cpu@0 {
> + compatible = "loongson,la264";
> + device_type = "cpu";
> + reg = <0x0>;
> + clocks = <&cpu_clk>;
> + };
> + };
> +
> + cpu_clk: cpu-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <500000000>;
> + };
> +
> + cpuintc: interrupt-controller {
> + compatible = "loongson,cpu-interrupt-controller";
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> +
> + bus@10000000 {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
> + <0x0 0x2000000 0x0 0x2000000 0x0 0x2000000>,
> + <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
> + <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
> + <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
ranges should be after compatible, just like reg is.
Anyway, that's a nit, so:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-08-22 6:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-21 12:49 [PATCH v3 0/7] LoongArch: Add built-in dtb support Binbin Zhou
2023-08-21 12:49 ` [PATCH v3 1/7] dt-bindings: loongarch: Add CPU bindings for LoongArch Binbin Zhou
2023-08-22 6:18 ` Krzysztof Kozlowski
2023-08-21 12:49 ` [PATCH v3 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles Binbin Zhou
2023-08-22 6:20 ` Krzysztof Kozlowski
2023-08-21 12:49 ` [PATCH v3 3/7] LoongArch: Allow device trees to be built into the kernel Binbin Zhou
2023-08-21 12:49 ` [PATCH v3 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500 Binbin Zhou
2023-08-22 6:22 ` Krzysztof Kozlowski [this message]
2023-08-21 12:49 ` [PATCH v3 5/7] LoongArch: dts: DeviceTree for Loongson-2K1000 Binbin Zhou
2023-08-22 6:25 ` Krzysztof Kozlowski
2023-08-21 12:49 ` [PATCH v3 6/7] LoongArch: dts: DeviceTree for Loongson-2K2000 Binbin Zhou
2023-08-21 12:49 ` [PATCH v3 7/7] LoongArch: Parsing CPU-related information from DTS Binbin Zhou
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