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From: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
To: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	alexandre.torgue-qxv4g6HH51o@public.gmane.org,
	lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org,
	knaack.h-Mmb7MZpHnFY@public.gmane.org,
	pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org,
	benjamin.gaignard-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	benjamin.gaignard-qxv4g6HH51o@public.gmane.org
Subject: Re: [PATCH 3/7] iio: adc: stm32: add trigger polarity extended attribute
Date: Tue, 24 Jan 2017 15:41:24 +0100	[thread overview]
Message-ID: <e78b51ed-5257-b60d-74a7-962fa0f92699@st.com> (raw)
In-Reply-To: <17e5b8ba-0ef3-34eb-aa30-a899f87616f7-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>


On 01/22/2017 01:58 PM, Jonathan Cameron wrote:
> On 19/01/17 13:34, Fabrice Gasnier wrote:
>> Define extended attribute so that user may choose rising, falling or both
>> edges for external trigger sources.
>> Default to rising edge in case it isn't set.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
> Creates a custom attibute.  Documentation please!
> /Documentation/ABI/testing/sysfs-bus-iio-stm32 or similar.

Ok, I'll add something like:
Documentation/ABI/testing/sysfs-bus-iio-adc-stm32:

+What:		/sys/bus/iio/devices/triggerX/trigger_polarity
+KernelVersion:	4.11
+Contact:	fabrice.gasnier-qxv4g6HH51o@public.gmane.org
+Description:
+		The STM32 ADC can be configured to use external trigger sources
+		(e.g. timers, pwm or exti gpio). Then, it can be tuned to start
+		conversions on external trigger by either:
+		- "rising-edge"
+		- "falling-edge"
+		- "both-edges".
+		Reading returns current trigger polarity.
+		Writing value before enabling conversions sets trigger polarity.

Best Regards,
Thanks,
Fabrice
>
> The approach seems reasonable, but easier to discuss when it's
> formally described.
>
> I'd also not care about characters saved and go with
> trigger_polarity rather than the short form (unless this you have
> a good reason for it!)
>
> Jonathan
>> ---
>>  drivers/iio/adc/stm32-adc.c | 51 ++++++++++++++++++++++++++++++++++++++++++++-
>>  1 file changed, 50 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
>> index 30708bc..9753c39 100644
>> --- a/drivers/iio/adc/stm32-adc.c
>> +++ b/drivers/iio/adc/stm32-adc.c
>> @@ -164,6 +164,7 @@ struct stm32_adc_trig_info {
>>   * @lock:		spinlock
>>   * @bufi:		data buffer index
>>   * @num_conv:		expected number of scan conversions
>> + * @exten:		external trigger config (enable/polarity)
>>   */
>>  struct stm32_adc {
>>  	struct stm32_adc_common	*common;
>> @@ -175,6 +176,7 @@ struct stm32_adc {
>>  	spinlock_t		lock;		/* interrupt lock */
>>  	int			bufi;
>>  	int			num_conv;
>> +	enum stm32_adc_exten	exten;
>>  };
>>
>>  /**
>> @@ -449,7 +451,9 @@ static int stm32_adc_set_trig(struct iio_dev *indio_dev,
>>
>>  		/* set trigger source, default to rising edge */
>>  		extsel = ret;
>> -		exten = STM32_EXTEN_HWTRIG_RISING_EDGE;
>> +		if (adc->exten == STM32_EXTEN_SWTRIG)
>> +			adc->exten = STM32_EXTEN_HWTRIG_RISING_EDGE;
>> +		exten = adc->exten;
>>  	}
>>
>>  	spin_lock_irqsave(&adc->lock, flags);
>> @@ -463,6 +467,39 @@ static int stm32_adc_set_trig(struct iio_dev *indio_dev,
>>  	return 0;
>>  }
>>
>> +static int stm32_adc_set_trig_pol(struct iio_dev *indio_dev,
>> +				  const struct iio_chan_spec *chan,
>> +				  unsigned int type)
>> +{
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +
>> +	adc->exten = type;
>> +
>> +	return 0;
>> +}
>> +
>> +static int stm32_adc_get_trig_pol(struct iio_dev *indio_dev,
>> +				  const struct iio_chan_spec *chan)
>> +{
>> +	struct stm32_adc *adc = iio_priv(indio_dev);
>> +
>> +	return adc->exten;
>> +}
>> +
>> +static const char * const stm32_trig_pol_items[] = {
>> +	[STM32_EXTEN_SWTRIG] = "swtrig",
>> +	[STM32_EXTEN_HWTRIG_RISING_EDGE] = "rising-edge",
>> +	[STM32_EXTEN_HWTRIG_FALLING_EDGE] = "falling-edge",
>> +	[STM32_EXTEN_HWTRIG_BOTH_EDGES] = "both-edges",
>> +};
>> +
>> +const struct iio_enum stm32_adc_trig_pol = {
>> +	.items = stm32_trig_pol_items,
>> +	.num_items = ARRAY_SIZE(stm32_trig_pol_items),
>> +	.get = stm32_adc_get_trig_pol,
>> +	.set = stm32_adc_set_trig_pol,
>> +};
>> +
>>  /**
>>   * stm32_adc_single_conv() - Performs a single conversion
>>   * @indio_dev: IIO device
>> @@ -745,6 +782,17 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
>>  	return IRQ_HANDLED;
>>  }
>>
>> +static const struct iio_chan_spec_ext_info stm32_adc_ext_info[] = {
>> +	IIO_ENUM("trigger_pol", IIO_SHARED_BY_ALL, &stm32_adc_trig_pol),
>> +	{
>> +		.name = "trigger_pol_available",
>> +		.shared = IIO_SHARED_BY_ALL,
>> +		.read = iio_enum_available_read,
>> +		.private = (uintptr_t)&stm32_adc_trig_pol,
>> +	},
>> +	{},
>> +};
>> +
>>  static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  				    struct iio_chan_spec *chan,
>>  				    const struct stm32_adc_chan_spec *channel,
>> @@ -760,6 +808,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
>>  	chan->scan_type.sign = 'u';
>>  	chan->scan_type.realbits = 12;
>>  	chan->scan_type.storagebits = 16;
>> +	chan->ext_info = stm32_adc_ext_info;
>>  }
>>
>>  static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
>>
>

  parent reply	other threads:[~2017-01-24 14:41 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19 13:34 [PATCH 0/7] Add support for triggered buffer mode to STM32 ADC Fabrice Gasnier
     [not found] ` <1484832854-6314-1-git-send-email-fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
2017-01-19 13:34   ` [PATCH 1/7] iio: adc: stm32: add support for triggered buffer mode Fabrice Gasnier
     [not found]     ` <1484832854-6314-2-git-send-email-fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
2017-01-22 12:53       ` Jonathan Cameron
2017-01-24 14:35         ` Fabrice Gasnier
2017-01-28 14:02           ` Jonathan Cameron
2017-01-19 13:34 ` [PATCH 2/7] iio: adc: stm32: Enable use of stm32 timer triggers Fabrice Gasnier
2017-01-19 23:31   ` kbuild test robot
     [not found]     ` <201701200712.zoWuIMA4%fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2017-01-21 12:55       ` Jonathan Cameron
2017-01-22 12:55   ` Jonathan Cameron
2017-01-24 14:37     ` Fabrice Gasnier
     [not found]       ` <6e42a729-3513-5586-13dc-10cf5e90f6a3-qxv4g6HH51o@public.gmane.org>
2017-01-28 12:46         ` Jonathan Cameron
2017-01-19 13:34 ` [PATCH 3/7] iio: adc: stm32: add trigger polarity extended attribute Fabrice Gasnier
     [not found]   ` <1484832854-6314-4-git-send-email-fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
2017-01-22 12:58     ` Jonathan Cameron
     [not found]       ` <17e5b8ba-0ef3-34eb-aa30-a899f87616f7-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-01-24 14:41         ` Fabrice Gasnier [this message]
2017-01-19 13:34 ` [PATCH 4/7] Documentation: dt: iio: stm32-adc: optional dma support Fabrice Gasnier
2017-01-21 20:54   ` Rob Herring
2017-01-19 13:34 ` [PATCH 5/7] iio: adc: stm32: add " Fabrice Gasnier
2017-01-22 13:14   ` Jonathan Cameron
     [not found]     ` <8e1e4672-2259-bd84-b646-f24026dcff64-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-01-24 14:43       ` Fabrice Gasnier
     [not found]         ` <48f9023e-9799-669e-94bd-782a2880a1e7-qxv4g6HH51o@public.gmane.org>
2017-01-24 18:25           ` Jonathan Cameron
2017-01-19 13:34 ` [PATCH 6/7] ARM: dts: stm32: Enable dma by default on stm32f4 adc Fabrice Gasnier
2017-01-19 13:34 ` [PATCH 7/7] ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-eval Fabrice Gasnier
2017-01-20  0:09   ` kbuild test robot
2017-01-20 10:19   ` Alexandre Torgue
2017-01-20 10:36     ` Fabrice Gasnier

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