From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31EAEC7EE2E for ; Sat, 10 Jun 2023 09:28:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234262AbjFJJ2Q (ORCPT ); Sat, 10 Jun 2023 05:28:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234273AbjFJJ2N (ORCPT ); Sat, 10 Jun 2023 05:28:13 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 203FC2D68 for ; Sat, 10 Jun 2023 02:28:11 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B0AE060BA6 for ; Sat, 10 Jun 2023 09:28:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B69BDC4339B; Sat, 10 Jun 2023 09:27:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686389290; bh=JeNd9EoPp12+uYLi5ZosgsJF5qp0+CIahTtNm8NnSbI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=c+1P8pGKlZYt5VR9P8sPEip17CA5XFt0habYs3SBZ7fF+dk+vMsFKegEdRuk0dEJ5 /eHQNYCB+WwaXl+P4b8Mjx3TABfAQetz3Go8/leP3MzOyC8416UT8UIEUMucT+k58F HhkHNHWLdxn5iH0UwU2tFC//kumcWI3BhvYgay2ycfs0B2WRq7lGEUqkGbUsCDFKgK TRTSF897bdZChRziI3YJQ9gflGW/I32piEWX5AxRyN9CxOu70hMKbo1vocR9+kVYLo fsB/RNU+7+IpsQsNc629MZexpU1dQvZRJJPCL5Vqgo/7T+3PTQyqUr5fz2b3LTCcLC YpRwBVdrGa8lA== Message-ID: Date: Sat, 10 Jun 2023 11:27:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH v2 00/17] Prevent NAND chip unevaluated properties Content-Language: en-US To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , linux-mtd@lists.infradead.org, Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Chris Packham , Thomas Petazzoni , Alexandre Torgue , AngeloGioacchino Del Regno , Brian Norris , Chen-Yu Tsai , Christophe Kerello , Heiko Stuebner , Jernej Skrabec , Kamal Dasu , Liang Yang , Manivannan Sadhasivam , Masahiro Yamada , Matthias Brugger , Maxime Coquelin , Maxime Ripard , Paul Cercueil , Samuel Holland , Vadivel Murugan , Xiangsheng Hou References: <20230606175246.190465-1-miquel.raynal@bootlin.com> From: Krzysztof Kozlowski In-Reply-To: <20230606175246.190465-1-miquel.raynal@bootlin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 06/06/2023 19:52, Miquel Raynal wrote: > As discussed with Krzysztof and Chris, it seems like each NAND > controller binding should actually restrain the properties allowed in > the NAND chip node with its own "unevaluatedProperties: false". This > only works if we reference a yaml schema which contains all the possible > properties *in the NAND chip node*. Indeed, the NAND controller yaml > schema contains properties for the NAND chip which are not evaluated > with this construction. > > Link: https://lore.kernel.org/all/a23dd485-a3d9-e31f-be3e-0ab293fcfc4a@linaro.org/ Please rebase on latest kernel. This is some very old tree if you CC this address. Best regards, Krzysztof