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Tue, 12 Dec 2023 00:43:40 -0800 (PST) Received: from [192.168.1.20] ([178.197.218.27]) by smtp.gmail.com with ESMTPSA id m3-20020a5d56c3000000b003334520e49bsm10326308wrw.53.2023.12.12.00.43.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 12 Dec 2023 00:43:40 -0800 (PST) Message-ID: Date: Tue, 12 Dec 2023 09:43:38 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes Content-Language: en-US To: JeeHeng Sia , "kernel@esmil.dk" , "conor@kernel.org" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "aou@eecs.berkeley.edu" , "mturquette@baylibre.com" , "sboyd@kernel.org" , "p.zabel@pengutronix.de" , "emil.renner.berthing@canonical.com" , Hal Feng , Xingyu Wu Cc: "linux-riscv@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-clk@vger.kernel.org" , Leyfoon Tan References: <20231206115000.295825-1-jeeheng.sia@starfivetech.com> <20231206115000.295825-17-jeeheng.sia@starfivetech.com> <4dd53599-5e80-4a00-a708-507c9c2e7b6b@linaro.org> <62705afb652e416695aa26e3bdb2500e@EXMBX066.cuchost.com> From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/12/2023 03:58, JeeHeng Sia wrote: > > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: Saturday, December 9, 2023 1:57 AM >> To: JeeHeng Sia ; kernel@esmil.dk; conor@kernel.org; robh+dt@kernel.org; >> krzysztof.kozlowski+dt@linaro.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; >> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de; emil.renner.berthing@canonical.com; Hal Feng >> ; Xingyu Wu >> Cc: linux-riscv@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org; Leyfoon Tan >> >> Subject: Re: [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes >> >> On 06/12/2023 12:50, Sia Jee Heng wrote: >>> Add SYSCRG/SYSCRG-NE/SYSCRG-NW/SYSCRG-SW/AONCRG clock and reset >>> nodes for JH8100 RISC-V SoC. >>> >>> Signed-off-by: Sia Jee Heng >>> Reviewed-by: Ley Foon Tan >> >> Really? Looks automated... Care to provide any links to effects of >> internal review? > https://gitlab.starfivetech.com/jeeheng.sia/linux/-/commits/JH8100_Upstream/ >> >>> --- >>> arch/riscv/boot/dts/starfive/jh8100-clk.dtsi | 180 +++++++++++++++++++ >>> arch/riscv/boot/dts/starfive/jh8100.dtsi | 115 ++++++++++++ >>> 2 files changed, 295 insertions(+) >>> create mode 100644 arch/riscv/boot/dts/starfive/jh8100-clk.dtsi >>> >>> diff --git a/arch/riscv/boot/dts/starfive/jh8100-clk.dtsi b/arch/riscv/boot/dts/starfive/jh8100-clk.dtsi >>> new file mode 100644 >>> index 000000000000..27ba249f523e >>> --- /dev/null >>> +++ b/arch/riscv/boot/dts/starfive/jh8100-clk.dtsi >>> @@ -0,0 +1,180 @@ >>> +// SPDX-License-Identifier: GPL-2.0 OR MIT >>> +/* >>> + * Copyright (C) 2023 StarFive Technology Co., Ltd. >>> + */ >>> + >>> +/ { >>> + clk_osc: clk_osc { >> >> No underscores in node names. > Noted. >> >>> + compatible = "fixed-clock"; >>> + #clock-cells = <0>; >>> + clock-frequency = <24000000>; >>> + }; >>> + >> >> ... >> >>> diff --git a/arch/riscv/boot/dts/starfive/jh8100.dtsi b/arch/riscv/boot/dts/starfive/jh8100.dtsi >>> index f26aff5c1ddf..9863c61324a0 100644 >>> --- a/arch/riscv/boot/dts/starfive/jh8100.dtsi >>> +++ b/arch/riscv/boot/dts/starfive/jh8100.dtsi >>> @@ -4,6 +4,9 @@ >>> */ >>> >>> /dts-v1/; >>> +#include >>> +#include >>> +#include "jh8100-clk.dtsi" >>> >>> / { >>> compatible = "starfive,jh8100"; >>> @@ -357,6 +360,104 @@ uart4: serial@121a0000 { >>> status = "disabled"; >>> }; >>> >>> + syscrg_ne: syscrg_ne@12320000 { >> >> clock-controller@ >> >> Just open your bindings and take a look how it is done there... >> >> This applies everywhere I assume you did not ignore all the other comments you did not respond to. Best regards, Krzysztof