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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ec05c78556sm76301fa.85.2024.06.12.15.06.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Jun 2024 15:06:40 -0700 (PDT) Message-ID: Date: Thu, 13 Jun 2024 01:06:39 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V4 2/8] dt-bindings: clock: qcom: Add SM8650 video clock controller Content-Language: en-US To: Jagadeesh Kona , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Satya Priya Kakitapalli , Ajit Pandey , Imran Shaik , Bryan O'Donoghue , Krzysztof Kozlowski References: <20240602114439.1611-1-quic_jkona@quicinc.com> <20240602114439.1611-3-quic_jkona@quicinc.com> From: Vladimir Zapolskiy In-Reply-To: <20240602114439.1611-3-quic_jkona@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Jagadeesh, On 6/2/24 14:44, Jagadeesh Kona wrote: > SM8650 video clock controller has most clocks same as SM8450, > but it also has few additional clocks and resets. Add device tree > bindings for the video clock controller on Qualcomm SM8650 platform > by defining these additional clocks and resets on top of SM8450. > > Signed-off-by: Jagadeesh Kona > Reviewed-by: Bryan O'Donoghue > Reviewed-by: Krzysztof Kozlowski thank you for the change. Reviewed-by: Vladimir Zapolskiy -- Best wishes, Vladimir