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[109.252.193.102]) by smtp.googlemail.com with ESMTPSA id a26sm517283ljk.55.2021.04.29.05.43.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Apr 2021 05:43:40 -0700 (PDT) Subject: Re: [PATCH v2 0/5] iommu: Support identity mappings of reserved-memory regions To: Krishna Reddy , Thierry Reding , Joerg Roedel , Rob Herring Cc: Will Deacon , Robin Murphy , Nicolin Chen , "devicetree@vger.kernel.org" , "iommu@lists.linux-foundation.org" , "linux-tegra@vger.kernel.org" References: <20210423163234.3651547-1-thierry.reding@gmail.com> <869ec3a2-26df-2ce8-bd21-b681d6ef3985@gmail.com> From: Dmitry Osipenko Message-ID: Date: Thu, 29 Apr 2021 15:43:40 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 29.04.2021 08:51, Krishna Reddy пишет: > Hi Dmitry, > >> Thank you for the answer. Could you please give more information about: >> 1) Are you on software or hardware team, or both? > > I am in the software team and has contributed to initial Tegra SMMU driver in the downstream along with earlier team member Hiroshi Doyu. > >> 2) Is SMMU a third party IP or developed in-house? > > Tegra SMMU is developed in-house. > >> 3) Do you have a direct access to HDL sources? Are you 100% sure that >> hardware does what you say? > > It was discussed with Hardware team before and again today as well. > Enabling ASID for display engine while it continues to access the buffer memory is a safe operation. > As per HW team, The only side-effect that can happen is additional latency to transaction as SMMU caches get warmed up. > >> 4) What happens when CPU writes to ASID register? Does SMMU state machine >> latch ASID status (making it visible) only at a single "safe" point? > > MC makes a decision on routing transaction through either SMMU page tables or bypassing based on the ASID register value. It > checks the ASID register only once per transaction in the pipeline. Thank you very much for the clarification.