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Thu, 12 Nov 2026 22:07:44 -0800 (PST) X-Received: by 2002:a17:90a:c2ce:b0:3a4:7730:33dd with SMTP id 98e67ed59e1d1-3b1b0d3b75fmr1260169a91.58.1794550064369; Thu, 12 Nov 2026 22:07:44 -0800 (PST) Received: from [10.239.133.243] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b1aec63b9bsm2850307a91.12.2026.11.12.22.07.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Nov 2026 22:07:44 -0800 (PST) Message-ID: Date: Fri, 13 Nov 2026 14:07:41 +0800 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v17 09/10] qcom-tgu: Add timer/counter functionality for TGU To: sashiko-reviews@lists.linux.dev Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org References: <20261113024935.3173715-1-songwei.chai@oss.qualcomm.com> <20261113024935.3173715-10-songwei.chai@oss.qualcomm.com> Content-Language: en-US From: "Songwei.Chai" In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEzMDAyNCBTYWx0ZWRfX8AQfrgghegIN /hyxBEDKOLiqAgRKiOvT0EIVOF71AUu3AlHO2/bAVA2emJUi/z5sbfp6E05+gOicfUUemCRwVLb mnS8CHsP6FAxjKL8q/dS9czYV7jGRWmbTNXM2qsI6nbe13DKRXcAVWkIhCgy5/zfD8RRf5JODcV tXxTr6M2zhz0zE58Axn/2UCAGb+VB+mh5b1V0GDTYHNP20GH7CVFPusSOlJs0YsMxKkWt/7XAZg 1ZADtFiqMmMhK08HW2bGE1T6E78OuJvAA8RV2ZhTTvRF1PtFZaLZIgQUtW65F8Edk6bSR1qXpYa rR0+TB9LsiWKB0AOKIYr7KhfRmAEt+Xouh11GMQXoXFmi0Ka/6UoqJaq1rTOdHW9X7I8dIwa2C5 JStDbcE1DicYsSA0684Jk3cJKFXc7tHqPaPMkBEDe/edtIzUjyOnIlHZJ/mRK2keotGcgSMWngf s2tOdcXuYaaxolUADig== X-Authority-Analysis: v=2.4 cv=AsF7T+9P c=1 sm=1 tr=0 ts=6af6a931 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=znVQ-4POmxq_k8OWJtUA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEzMDAyNCBTYWx0ZWRfXynla+0zJSzet OcDYOQhy5t3n+MLFHhRuGOHy7T9OTanEMw/3H/NV5/UGTWsK6JMwOJxIx3/t6PHRLYgq1n/jhQa hs+TnMPPCaglHbpklTrSQDK0xu9+fWk= X-Proofpoint-GUID: l6Z0AUNRgjnOm7koeYA8x8NiXjKhyfNQ X-Proofpoint-ORIG-GUID: l6Z0AUNRgjnOm7koeYA8x8NiXjKhyfNQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-13_02,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 phishscore=0 impostorscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611130024 On 11/13/2026 11:01 AM, sashiko-bot@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 1 potential > issue to consider: > - [High] qcom-tgu: swapped step_index and operation_index in > tgu_dataset_rw() > -- > > commit 55838204d9ea620c8df4d9d4233a3561aeb9ea39 > Author: Songwei Chai > > qcom-tgu: Add timer/counter functionality for TGU > > This commit adds per-step timer and counter sysfs attributes and hardware > register programming for the Qualcomm Trigger Generation Unit (TGU). > >> diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c >> index 6e66752a7b8dd..1cb131a3c5213 100644 >> --- a/drivers/hwtracing/qcom/tgu.c >> +++ b/drivers/hwtracing/qcom/tgu.c > [ ... ] > >> @@ -496,6 +566,38 @@ static const struct attribute_group tgu_common_grp = { >> .name = "step" #step "_condition_select" \ >> }) >> >> +#define STEP_TIMER(step_index, reg_num) \ >> + tgu_dataset_rw(reg##reg_num, step_index, TGU_TIMER, reg_num) >> + >> +#define STEP_TIMER_LIST(step_index) \ >> + {STEP_TIMER(step_index, 0), \ >> + STEP_TIMER(step_index, 1), \ >> + NULL \ >> + } >> + >> +#define TIMER_ATTRIBUTE_GROUP_INIT(step)\ >> + (&(const struct attribute_group){\ >> + .attrs = (struct attribute*[])STEP_TIMER_LIST(step),\ >> + .is_visible = tgu_node_visible,\ >> + .name = "step" #step "_timer" \ >> + }) >> + >> +#define STEP_COUNTER(step_index, reg_num) \ >> + tgu_dataset_rw(reg##reg_num, step_index, TGU_COUNTER, reg_num) > [Severity: High] > Do STEP_TIMER() and STEP_COUNTER() initialize operation_index and > step_index in the wrong order via tgu_dataset_rw()? > > drivers/hwtracing/qcom/tgu.c: > struct tgu_attribute { > struct device_attribute attr; > enum operation_index operation_index; > u8 step_index; > u8 reg_num; > }; > ... > #define tgu_dataset_rw(name, step_index, priority, reg_num) \ > (&((struct tgu_attribute[]){ { \ > __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \ > step_index, \ > priority, \ > reg_num, \ > } })[0].attr.attr) > > Because tgu_dataset_rw() initializes struct tgu_attribute positionally, > every timer and counter attribute gets tgu_attr->operation_index set to > step_index (0..7) and tgu_attr->step_index set to TGU_TIMER (6) or > TGU_COUNTER (7). > > In tgu_node_visible(), tgu_attr->step_index >= drvdata->num_step hides all > timer groups when num_step <= 6 and all counter groups when num_step <= 7. > When visible, tgu_dataset_show() and tgu_dataset_store() switch on > operation_index and read or write priority, condition_decode, and > condition_select for steps 6 and 7 instead of drvdata->timer and > drvdata->counter. Conversely, adding TGU_TIMER (6) and TGU_COUNTER (7) to > enum operation_index causes the existing step 6 and step 7 priority, > condition_decode, and condition_select attributes (which also use > tgu_dataset_rw()) to be dispatched as TGU_TIMER and TGU_COUNTER. Same issue as patch 6 >