From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E578434EF05; Fri, 16 Oct 2026 14:51:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792162302; cv=none; b=H0/Qx1ibHUvHUAWhYsza+/n6ZGOXt6OUi35rjrxLcyOMw0TZptQYr580r9TO8KXnJHG7mu1oR7pY8/a/GSxUo3tvyFlcEK3YgxRrA3JJ8WpBb6QmVZ1mWeTbcmZhohlsMXYUSGokv4MSsfjRqc+Fiwi0nCXk62dsvtiU8YaODmc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792162302; c=relaxed/simple; bh=XAqiXLlhgf+/F9hDAmXS+sPEb4Sjw+LYKzpQOJi9kAM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Nkw9ztUXU5GvPiJmJndFpJyydxiDQoIFo6C5WwVs2+WWERPOXJIuIwO8rNrz57An0koepGBKaW0Kau2591RXNcLhQZRJj+lqdKFnVKrIlZF7dyRZfEAeAKSvA5yZ81hxl/b40k1zbdPit5+8rvJ4JLIb/QidHm0R2GwlEOYkD8s= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gl2/odbW; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gl2/odbW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2C8B1F000C5; Fri, 16 Oct 2026 14:51:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792162301; bh=FS4akPMmTKn/XxnyNATR0rYZuSEvn1Rz3NANKinyLK8=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=gl2/odbWolkTtsI8DbH/fRUIGtRdbBf5mzbeQrIdAcoJ8kMHhYbh8fgY/b7d0baTm JNiochyMaCS/hBbtJdjoopVjJ6PP3wKR6fKAtWEU0bDniHx030vR/wjHPygwUAb+oH F8W8vXWxOvzfNXMDhMAPUhmMf953Bm9aReNRsA9Nq/XD9GrhrPdZogClQUL24phpsn N0Ib/K7TtcySCh0i8wLImPmLzr+wNCCoCP/ZborLM+k5l25Z5R/rte+skwiGAZ5Tgt c7VvJSEBxPBwgeWfeIsmj9FJVFdGR4AGqTzc4mugU6hIVj8GQFsPTf/vY4AbJqJ30x ISwvJ9JSGfpTA== Message-ID: Date: Fri, 16 Oct 2026 16:51:34 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/10] dt-bindings: pinctrl: Add devicetree bindings for DM816x SoC Pinctrl To: Ettore Chimenti , Paul Walmsley , Aaro Koskinen , Andreas Kemnade , Kevin Hilman , Roger Quadros , Tony Lindgren , Russell King , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Christopher Obbard , Andrew Goodbody , Linus Walleij , Rouven Czerwinski Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org References: <20261016-patch-ektor5-dm8168-dts-v1-0-b4ce30217028@linaro.org> <20261016-patch-ektor5-dm8168-dts-v1-2-b4ce30217028@linaro.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 16/10/2026 16:41, Ettore Chimenti wrote: > Add devicetree bindings for TI DM816x SoC pinctrl configuration. > Using same definition as OMAP2/3 except pullup/down enable macros, which > are inverted in this SoC. > > Signed-off-by: Ettore Chimenti > --- > include/dt-bindings/pinctrl/dm816x.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/include/dt-bindings/pinctrl/dm816x.h b/include/dt-bindings/pinctrl/dm816x.h > new file mode 100644 > index 000000000000..15aa15bca9bd > --- /dev/null > +++ b/include/dt-bindings/pinctrl/dm816x.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * This header provides constants specific to DM816X pinctrl bindings. > + */ > + > +#ifndef _DT_BINDINGS_PINCTRL_DM816X_H > +#define _DT_BINDINGS_PINCTRL_DM816X_H > + > +#include I do not see this being used here, IWYU. > + > +#undef PULL_UP > +#undef PULL_ENA Why are you undefining other macros? That's not a easy to follow code. > + > +/* DM81xx mux bit defines */ > +#define PULL_ENA (0 << 3) /* Pullup enabled => 0 */ > +#define PULL_DIS (1 << 3) /* Pullup disabled => 1 */ > +#define PULL_DN (0 << 4) > +#define PULL_UP (1 << 4) I do not see this used by drivers, so why do we need one more header? What part of SW are you binding here? Best regards, Krzysztof