From: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
To: Vinod Koul <vkoul@kernel.org>, Md Sadre Alam <quic_mdalam@quicinc.com>
Cc: <konrad.dybcio@linaro.org>, <andersson@kernel.org>,
<andi.shyti@kernel.org>, <linux-arm-msm@vger.kernel.org>,
<dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-i2c@vger.kernel.org>, <conor+dt@kernel.org>,
<agross@kernel.org>, <devicetree@vger.kernel.org>,
<linux@treblig.org>, <dan.carpenter@linaro.org>,
<Frank.Li@nxp.com>, <konradybcio@kernel.org>,
<bryan.odonoghue@linaro.org>, <krzk+dt@kernel.org>,
<robh@kernel.org>, <quic_vdadhani@quicinc.com>
Subject: Re: [PATCH v5 2/4] dmaengine: gpi: Add Lock and Unlock TRE support to access I2C exclusively
Date: Tue, 31 Mar 2026 17:03:05 +0530 [thread overview]
Message-ID: <ec299ca8-cfa2-4a53-93d5-4395a7cc5e7c@quicinc.com> (raw)
In-Reply-To: <1566eafb-7286-4f27-922d-0bbaaab8120b@quicinc.com>
Hi Vinod, sorry for responding here much lately. I was completely away
from this work for long, restarting now. Will close this actively
following up here and I will upload V6 to share latest changes and cover
letter details to help review ahead with context.
Thanks for your time and help review this ahead.
On 1/14/2025 2:48 PM, Mukesh Kumar Savaliya wrote:
> Hi Vinod,
>
> On 12/26/2024 5:52 PM, Mukesh Kumar Savaliya wrote:
>>
>>
>> On 12/24/2024 3:28 PM, Vinod Koul wrote:
>>> On 18-12-24, 18:04, Mukesh Kumar Savaliya wrote:
>>>> Hi Vinod, Thanks ! I just saw your comments now as somehow it was
>>>> going in
>>>> some other folder and didn't realize.
>>>>
>>>> On 12/4/2024 5:51 PM, Vinod Koul wrote:
>>>>> On 02-12-24, 16:13, Mukesh Kumar Savaliya wrote:
>>>>>> Thanks for the review comments Vinod !
>>>>>>
>>>>>> On 12/2/2024 12:17 PM, Vinod Koul wrote:
>>>>>>> On 29-11-24, 20:13, Mukesh Kumar Savaliya wrote:
>>>>>>>> GSI DMA provides specific TREs(Transfer ring element) namely
>>>>>>>> Lock and
>>>>>>>> Unlock TRE. It provides mutually exclusive access to I2C
>>>>>>>> controller from
>>>>>>>> any of the processor(Apps,ADSP). Lock prevents other subsystems
>>>>>>>> from
>>>>>>>> concurrently performing DMA transfers and avoids disturbance to
>>>>>>>> data path.
>>>>>>>> Basically for shared I2C usecase, lock the SE(Serial Engine) for
>>>>>>>> one of
>>>>>>>> the processor, complete the transfer, unlock the SE.
>>>>>>>>
>>>>>>>> Apply Lock TRE for the first transfer of shared SE and Apply Unlock
>>>>>>>> TRE for the last transfer.
>>>>>>>>
>>>>>>>> Also change MAX_TRE macro to 5 from 3 because of the two
>>>>>>>> additional TREs.
>>>>>>>>
>>>>>>>
>>>>>>> ...
>>>>>>>
>>>>>>>> @@ -65,6 +65,9 @@ enum i2c_op {
>>>>>>>> * @rx_len: receive length for buffer
>>>>>>>> * @op: i2c cmd
>>>>>>>> * @muli-msg: is part of multi i2c r-w msgs
>>>>>>>> + * @shared_se: bus is shared between subsystems
>>>>>>>> + * @bool first_msg: use it for tracking multimessage xfer
>>>>>>>> + * @bool last_msg: use it for tracking multimessage xfer
>>>>>>>> */
>>>>>>>> struct gpi_i2c_config {
>>>>>>>> u8 set_config;
>>>>>>>> @@ -78,6 +81,9 @@ struct gpi_i2c_config {
>>>>>>>> u32 rx_len;
>>>>>>>> enum i2c_op op;
>>>>>>>> bool multi_msg;
>>>>>>>> + bool shared_se;
>>>>>>>
>>>>>>> Looking at this why do you need this field? It can be internal to
>>>>>>> your
>>>>>>> i2c driver... Why not just set an enum for lock and use the
>>>>>>> values as
>>>>>>> lock/unlock/dont care and make the interface simpler. I see no
>>>>>>> reason to
>>>>>>> use three variables to communicate the info which can be handled in
>>>>>>> simpler way..?
>>>>>>>
>>>>>> Below was earlier reply to [PATCH V3, 2/4], please let me know if
>>>>>> you have
>>>>>> any additional comment and need further clarifications.
>>>>>
>>>>> Looks like you misunderstood, the question is why do you need three
>>>>> variables to convey this info..? Use a single variable please
>>>> Yes, I think so. Please let me clarify.
>>>> First variable is a feature flag and it's required to be explicitly
>>>> mentioned by client (i2c/spi/etc) to GSI driver.
>>>>
>>>> Second and third, can be optimized to boolean so either first or
>>>> last can be
>>>> passed.
>>>>
>>>> Please correct me or add simple change where you would like to make,
>>>> i can
>>>> add that.
>>>
>>> I though we could do with a single and derive
>>>
>> Sure, so as mentioned in the other crypto BAM patch probably
>> dmaengine.h can hold flag and that can add support for lock/unlock
>> similar to that patch.
>> I just realized it from your shared patch. let me work internally with
>> Md sadre and review. Thanks for the comment.
>>> Also, please see 20241212041639.4109039-3-quic_mdalam@quicinc.com, folks
>>> from same company should talk together on same solutions, please
>>> converge and come up with a single proposal which works for both drivers
>>>
> I have discussed with Md Sadre and tried to understand and utilize the
> enum of lock and unlock in my changes. Below is the summary.
>
> I can't use those lock and unlock enums here because it's required for
> first and last message respectively. intermediate transfers will not use
> anything. So we need to define one more enum like dma_ctrl_none.
>
> if i create another internal parent structure having required 3 members,
> then also it will need 3 child members. So i think current one looks
> good to me.
>
> Please help review and suggest if anything can be better here.
>
I have added enum from gpi driver and set it from i2c driver. so GPI
driver handles the action accordingly for lock/unlock. Let me know if
this approach makes sense in the V6.
>> Sure
>>
>>
>
>
next prev parent reply other threads:[~2026-03-31 11:33 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-29 14:43 [PATCH v5 0/4] Enable shared SE support over I2C Mukesh Kumar Savaliya
2024-11-29 14:43 ` [PATCH v5 1/4] dt-bindindgs: i2c: qcom,i2c-geni: Document shared flag Mukesh Kumar Savaliya
2024-11-29 15:14 ` Krzysztof Kozlowski
2024-12-02 4:00 ` Mukesh Kumar Savaliya
2024-12-02 7:19 ` Krzysztof Kozlowski
2024-12-02 10:38 ` Mukesh Kumar Savaliya
2024-12-02 11:04 ` Krzysztof Kozlowski
2024-12-02 11:13 ` Krzysztof Kozlowski
2024-12-09 15:07 ` Mukesh Kumar Savaliya
2024-12-02 12:55 ` Mukesh Kumar Savaliya
2024-12-02 14:04 ` Konrad Dybcio
2024-12-09 15:01 ` Mukesh Kumar Savaliya
2024-12-10 7:28 ` Krzysztof Kozlowski
2024-12-10 9:09 ` Konrad Dybcio
2024-12-10 11:53 ` Krzysztof Kozlowski
2024-12-10 12:05 ` Krzysztof Kozlowski
2024-12-10 12:38 ` Konrad Dybcio
2024-12-10 15:17 ` Mukesh Kumar Savaliya
2024-12-10 15:24 ` Konrad Dybcio
2024-12-10 15:56 ` Krzysztof Kozlowski
2024-12-10 17:52 ` Bjorn Andersson
2026-03-31 11:32 ` Mukesh Kumar Savaliya
2024-11-30 4:45 ` Bjorn Andersson
2024-12-02 10:38 ` Mukesh Kumar Savaliya
2024-12-03 15:43 ` Bjorn Andersson
2024-11-29 14:43 ` [PATCH v5 2/4] dmaengine: gpi: Add Lock and Unlock TRE support to access I2C exclusively Mukesh Kumar Savaliya
2024-12-02 6:47 ` Vinod Koul
2024-12-02 10:43 ` Mukesh Kumar Savaliya
2024-12-04 12:21 ` Vinod Koul
2024-12-18 12:34 ` Mukesh Kumar Savaliya
2024-12-24 9:58 ` Vinod Koul
2024-12-26 12:22 ` Mukesh Kumar Savaliya
2025-01-14 9:18 ` Mukesh Kumar Savaliya
2026-03-31 11:33 ` Mukesh Kumar Savaliya [this message]
2024-11-29 14:43 ` [PATCH v5 3/4] soc: qcom: geni-se: Do not keep GPIOs to sleep state for shared SE usecase Mukesh Kumar Savaliya
2024-11-29 14:43 ` [PATCH v5 4/4] i2c: i2c-qcom-geni: Enable i2c controller sharing between two subsystems Mukesh Kumar Savaliya
2024-12-13 13:05 ` Konrad Dybcio
2024-12-15 8:59 ` Mukesh Kumar Savaliya
2024-12-16 12:10 ` Konrad Dybcio
2024-12-16 12:47 ` Mukesh Kumar Savaliya
2026-03-31 11:34 ` Mukesh Kumar Savaliya
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