* [PATCH v4 1/2] arm64: dts: qcom: qcs615: Add clock nodes for multimedia clock
2025-06-25 11:13 [PATCH v4 0/2] Add support for clock controllers and CPU scaling for QCS615 Taniya Das
@ 2025-06-25 11:14 ` Taniya Das
2025-06-25 11:14 ` [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node Taniya Das
1 sibling, 0 replies; 9+ messages in thread
From: Taniya Das @ 2025-06-25 11:14 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Ajit Pandey, Imran Shaik, Jagadeesh Kona, linux-arm-msm,
devicetree, linux-kernel, Taniya Das, Konrad Dybcio
Add support for video, camera, display and gpu clock controller nodes
for QCS615 platform.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs615.dtsi | 51 ++++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index bfbb210354922766a03fe05e6d117ea21d118081..5adf409d7ce7226042c759cc83ceca331097ae37 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -3,7 +3,11 @@
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
+#include <dt-bindings/clock/qcom,qcs615-camcc.h>
+#include <dt-bindings/clock/qcom,qcs615-dispcc.h>
#include <dt-bindings/clock/qcom,qcs615-gcc.h>
+#include <dt-bindings/clock/qcom,qcs615-gpucc.h>
+#include <dt-bindings/clock/qcom,qcs615-videocc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/interconnect/qcom,icc.h>
@@ -1506,6 +1510,18 @@ data-pins {
};
};
+ gpucc: clock-controller@5090000 {
+ compatible = "qcom,qcs615-gpucc";
+ reg = <0 0x05090000 0 0x9000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GPLL0>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
stm@6002000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x0 0x06002000 0x0 0x1000>,
@@ -3317,6 +3333,41 @@ gem_noc: interconnect@9680000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ videocc: clock-controller@ab00000 {
+ compatible = "qcom,qcs615-videocc";
+ reg = <0 0x0ab00000 0 0x10000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
+ camcc: clock-controller@ad00000 {
+ compatible = "qcom,qcs615-camcc";
+ reg = <0 0x0ad00000 0 0x10000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
+ dispcc: clock-controller@af00000 {
+ compatible = "qcom,qcs615-dispcc";
+ reg = <0 0x0af00000 0 0x20000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,qcs615-pdc", "qcom,pdc";
reg = <0x0 0x0b220000 0x0 0x30000>,
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-25 11:13 [PATCH v4 0/2] Add support for clock controllers and CPU scaling for QCS615 Taniya Das
2025-06-25 11:14 ` [PATCH v4 1/2] arm64: dts: qcom: qcs615: Add clock nodes for multimedia clock Taniya Das
@ 2025-06-25 11:14 ` Taniya Das
2025-06-25 11:36 ` Dmitry Baryshkov
1 sibling, 1 reply; 9+ messages in thread
From: Taniya Das @ 2025-06-25 11:14 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Ajit Pandey, Imran Shaik, Jagadeesh Kona, linux-arm-msm,
devicetree, linux-kernel, Taniya Das
Add cpufreq-hw node to support CPU frequency scaling.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index 5adf409d7ce7226042c759cc83ceca331097ae37..d06fc1c157454f635389ff0645fcf4b378270dbc 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -36,6 +36,8 @@ cpu0: cpu@0 {
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_0>;
+ clocks = <&cpufreq_hw 0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
l2_0: l2-cache {
@@ -56,6 +58,8 @@ cpu1: cpu@100 {
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_100>;
+ clocks = <&cpufreq_hw 0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
l2_100: l2-cache {
compatible = "cache";
@@ -75,6 +79,8 @@ cpu2: cpu@200 {
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_200>;
+ clocks = <&cpufreq_hw 0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
l2_200: l2-cache {
compatible = "cache";
@@ -94,6 +100,8 @@ cpu3: cpu@300 {
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_300>;
+ clocks = <&cpufreq_hw 0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
l2_300: l2-cache {
compatible = "cache";
@@ -113,6 +121,8 @@ cpu4: cpu@400 {
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_400>;
+ clocks = <&cpufreq_hw 0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
l2_400: l2-cache {
compatible = "cache";
@@ -132,6 +142,8 @@ cpu5: cpu@500 {
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&l2_500>;
+ clocks = <&cpufreq_hw 0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
l2_500: l2-cache {
compatible = "cache";
@@ -151,6 +163,8 @@ cpu6: cpu@600 {
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <404>;
next-level-cache = <&l2_600>;
+ clocks = <&cpufreq_hw 1>;
+ qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
l2_600: l2-cache {
@@ -171,6 +185,8 @@ cpu7: cpu@700 {
capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <404>;
next-level-cache = <&l2_700>;
+ clocks = <&cpufreq_hw 1>;
+ qcom,freq-domain = <&cpufreq_hw 1>;
l2_700: l2-cache {
compatible = "cache";
@@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
qcom,remote-pid = <2>;
};
};
+
+ cpufreq_hw: cpufreq@18323000 {
+ compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
+ reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;
+ reg-names = "freq-domain0", "freq-domain1";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+ clock-names = "xo", "alternate";
+
+ #freq-domain-cells = <1>;
+ #clock-cells = <1>;
+ };
+
};
arch_timer: timer {
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-25 11:14 ` [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node Taniya Das
@ 2025-06-25 11:36 ` Dmitry Baryshkov
2025-06-27 3:52 ` Taniya Das
0 siblings, 1 reply; 9+ messages in thread
From: Dmitry Baryshkov @ 2025-06-25 11:36 UTC (permalink / raw)
To: Taniya Das
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ajit Pandey, Imran Shaik, Jagadeesh Kona,
linux-arm-msm, devicetree, linux-kernel
On Wed, Jun 25, 2025 at 04:44:01PM +0530, Taniya Das wrote:
> Add cpufreq-hw node to support CPU frequency scaling.
>
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> @@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
> qcom,remote-pid = <2>;
> };
> };
> +
> + cpufreq_hw: cpufreq@18323000 {
> + compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
Why? Other platforms use a true SoC as the first entry.
> + reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;
> + reg-names = "freq-domain0", "freq-domain1";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> + clock-names = "xo", "alternate";
> +
> + #freq-domain-cells = <1>;
> + #clock-cells = <1>;
> + };
> +
> };
>
> arch_timer: timer {
>
> --
> 2.34.1
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-25 11:36 ` Dmitry Baryshkov
@ 2025-06-27 3:52 ` Taniya Das
2025-06-27 12:07 ` Konrad Dybcio
2025-06-27 12:35 ` Dmitry Baryshkov
0 siblings, 2 replies; 9+ messages in thread
From: Taniya Das @ 2025-06-27 3:52 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ajit Pandey, Imran Shaik, Jagadeesh Kona,
linux-arm-msm, devicetree, linux-kernel
On 6/25/2025 5:06 PM, Dmitry Baryshkov wrote:
> On Wed, Jun 25, 2025 at 04:44:01PM +0530, Taniya Das wrote:
>> Add cpufreq-hw node to support CPU frequency scaling.
>>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++
>> 1 file changed, 29 insertions(+)
>>
>> @@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
>> qcom,remote-pid = <2>;
>> };
>> };
>> +
>> + cpufreq_hw: cpufreq@18323000 {
>> + compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
>
> Why? Other platforms use a true SoC as the first entry.
>
Dmitry, from cpufreq-hw perspective SC7180 is a exact match for QCS615
and that was the reason to use the same.
>> + reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;
>> + reg-names = "freq-domain0", "freq-domain1";
>> +
>> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
>> + clock-names = "xo", "alternate";
>> +
>> + #freq-domain-cells = <1>;
>> + #clock-cells = <1>;
>> + };
>> +
>> };
>>
>> arch_timer: timer {
>>
>> --
>> 2.34.1
>>
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-27 3:52 ` Taniya Das
@ 2025-06-27 12:07 ` Konrad Dybcio
2025-07-01 8:37 ` Taniya Das
2025-06-27 12:35 ` Dmitry Baryshkov
1 sibling, 1 reply; 9+ messages in thread
From: Konrad Dybcio @ 2025-06-27 12:07 UTC (permalink / raw)
To: Taniya Das, Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ajit Pandey, Imran Shaik, Jagadeesh Kona,
linux-arm-msm, devicetree, linux-kernel
On 6/27/25 5:52 AM, Taniya Das wrote:
>
>
> On 6/25/2025 5:06 PM, Dmitry Baryshkov wrote:
>> On Wed, Jun 25, 2025 at 04:44:01PM +0530, Taniya Das wrote:
>>> Add cpufreq-hw node to support CPU frequency scaling.
>>>
>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++
>>> 1 file changed, 29 insertions(+)
>>>
>>> @@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
>>> qcom,remote-pid = <2>;
>>> };
>>> };
>>> +
>>> + cpufreq_hw: cpufreq@18323000 {
>>> + compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
>>
>> Why? Other platforms use a true SoC as the first entry.
>>
> Dmitry, from cpufreq-hw perspective SC7180 is a exact match for QCS615
> and that was the reason to use the same.
The only compatible consumed by the driver is the last one in this case,
meaning sc7180 is only there so that if we discover quirks very specific
to sc7180 down the line, we can add some exceptions in code
Reusing sc7180 would remove the ability to address any quirks that would
concern qcs615 specifically, which can happen due to hw design, fw
quirks etc.
Konrad
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-27 12:07 ` Konrad Dybcio
@ 2025-07-01 8:37 ` Taniya Das
0 siblings, 0 replies; 9+ messages in thread
From: Taniya Das @ 2025-07-01 8:37 UTC (permalink / raw)
To: Konrad Dybcio, Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ajit Pandey, Imran Shaik, Jagadeesh Kona,
linux-arm-msm, devicetree, linux-kernel
On 6/27/2025 5:37 PM, Konrad Dybcio wrote:
> On 6/27/25 5:52 AM, Taniya Das wrote:
>>
>>
>> On 6/25/2025 5:06 PM, Dmitry Baryshkov wrote:
>>> On Wed, Jun 25, 2025 at 04:44:01PM +0530, Taniya Das wrote:
>>>> Add cpufreq-hw node to support CPU frequency scaling.
>>>>
>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++
>>>> 1 file changed, 29 insertions(+)
>>>>
>>>> @@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
>>>> qcom,remote-pid = <2>;
>>>> };
>>>> };
>>>> +
>>>> + cpufreq_hw: cpufreq@18323000 {
>>>> + compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
>>>
>>> Why? Other platforms use a true SoC as the first entry.
>>>
>> Dmitry, from cpufreq-hw perspective SC7180 is a exact match for QCS615
>> and that was the reason to use the same.
>
> The only compatible consumed by the driver is the last one in this case,
> meaning sc7180 is only there so that if we discover quirks very specific
> to sc7180 down the line, we can add some exceptions in code
>
> Reusing sc7180 would remove the ability to address any quirks that would
> concern qcs615 specifically, which can happen due to hw design, fw
> quirks etc.
>
There are no quirks for QCS615 as the block is a re-use in design. I
will add the new update to use the "qcom,qcs615-cpufreq-hw".
> Konrad
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-27 3:52 ` Taniya Das
2025-06-27 12:07 ` Konrad Dybcio
@ 2025-06-27 12:35 ` Dmitry Baryshkov
2025-07-01 8:38 ` Taniya Das
1 sibling, 1 reply; 9+ messages in thread
From: Dmitry Baryshkov @ 2025-06-27 12:35 UTC (permalink / raw)
To: Taniya Das
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ajit Pandey, Imran Shaik, Jagadeesh Kona,
linux-arm-msm, devicetree, linux-kernel
On 27/06/2025 06:52, Taniya Das wrote:
>
>
> On 6/25/2025 5:06 PM, Dmitry Baryshkov wrote:
>> On Wed, Jun 25, 2025 at 04:44:01PM +0530, Taniya Das wrote:
>>> Add cpufreq-hw node to support CPU frequency scaling.
>>>
>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++
>>> 1 file changed, 29 insertions(+)
>>>
>>> @@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
>>> qcom,remote-pid = <2>;
>>> };
>>> };
>>> +
>>> + cpufreq_hw: cpufreq@18323000 {
>>> + compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
>>
>> Why? Other platforms use a true SoC as the first entry.
>>
> Dmitry, from cpufreq-hw perspective SC7180 is a exact match for QCS615
> and that was the reason to use the same.
Please look around. A quick `git grep` would show that every SoC uses
SoC-specific compatible (although some of them are definitely
compatible). The reason is pretty simple: each platform might have
SoC-specific tunings and quirks.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs615: Add CPU scaling clock node
2025-06-27 12:35 ` Dmitry Baryshkov
@ 2025-07-01 8:38 ` Taniya Das
0 siblings, 0 replies; 9+ messages in thread
From: Taniya Das @ 2025-07-01 8:38 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Ajit Pandey, Imran Shaik, Jagadeesh Kona,
linux-arm-msm, devicetree, linux-kernel
On 6/27/2025 6:05 PM, Dmitry Baryshkov wrote:
> On 27/06/2025 06:52, Taniya Das wrote:
>>
>>
>> On 6/25/2025 5:06 PM, Dmitry Baryshkov wrote:
>>> On Wed, Jun 25, 2025 at 04:44:01PM +0530, Taniya Das wrote:
>>>> Add cpufreq-hw node to support CPU frequency scaling.
>>>>
>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 ++++++++++++++++++++++++
>>>> +++++
>>>> 1 file changed, 29 insertions(+)
>>>>
>>>> @@ -3891,6 +3907,19 @@ glink_edge: glink-edge {
>>>> qcom,remote-pid = <2>;
>>>> };
>>>> };
>>>> +
>>>> + cpufreq_hw: cpufreq@18323000 {
>>>> + compatible = "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw";
>>>
>>> Why? Other platforms use a true SoC as the first entry.
>>>
>> Dmitry, from cpufreq-hw perspective SC7180 is a exact match for QCS615
>> and that was the reason to use the same.
>
> Please look around. A quick `git grep` would show that every SoC uses
> SoC-specific compatible (although some of them are definitely
> compatible). The reason is pretty simple: each platform might have SoC-
> specific tunings and quirks.
>
Sure Dmitry, I will update to use "qcom,qcs615-cpufreq-hw"
^ permalink raw reply [flat|nested] 9+ messages in thread