From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F6A2C43219 for ; Fri, 4 Nov 2022 12:45:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231378AbiKDMp2 (ORCPT ); Fri, 4 Nov 2022 08:45:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230139AbiKDMp2 (ORCPT ); Fri, 4 Nov 2022 08:45:28 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA04124950 for ; Fri, 4 Nov 2022 05:45:26 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id o12so7255360lfq.9 for ; Fri, 04 Nov 2022 05:45:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=FvboXhj8KjyqdPoeiCN2lb+BeTNUFPqnKJjE5L7Rgjw=; b=Ky42DZM27vCCbaHpCg7ZLJUC8lDtMRRqC/uSYDVINXUXFBVFEGtPQ4kqpXm7c2uhfv iq1Ohcn/p2LToIti84k3NebbF2pvxD5eeso6ZsGMrKspA1D8O+ZxtN1N4dbuHU1Da6kL pKRpfAtw8NoSYpyWENMzeUoHj6fI3SLGLj72W2YMIbdSeGcyZgF+ojDhlPj3UdkOHWSj v+PD30SOyhTlE3yNzYngKbBZ1hysbIQWV9+iP0dwKick3lo26e1PGDybZZnGzLoMQz3Y AEEYuSY9r+HZvJgrNRInHmeI652IBuQMtY0h7LbVAgeYRrmonY13x3d/Eq4ZNLDiZJoD oIFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=FvboXhj8KjyqdPoeiCN2lb+BeTNUFPqnKJjE5L7Rgjw=; b=YHoJDA85UuYyVWenBa2VCVeRgTrogItu/KmnImFNTV11+XBQE15TQSbuXG5vIYGUQO gMQ6dRezsXXNc31xnlC+k8R5oaxCiMrlP0WIF9MY3PLf36RWhhL1L2oQrnw+PpdMPK7X QMoQzrmnMB9zp5PJgiyYpzfms/EUrBBoCiXMiXmuAPHzRYn3qB5OmsXFD5QlmlDbdZsS qOZcWwY7SPEQFumsNvPM0Ugt3Qe9lSJhjv9Czu/lIsqmh4osJ9HRe/dFYr00Kxzq+3Gs mC4G4/1JsOYn/LxErDshwZ3R5+9xSOSMvT84Fs/tkjWkoJlTtQGu9iRNQEfq/LYQCG6Y T0jQ== X-Gm-Message-State: ACrzQf0Lzlu1byEVUeszMj1A6rQKAAO7kczzq7CgKSux87H72F+snGkT xaRduy/ijUCV/qB1yf4r1RWvdA== X-Google-Smtp-Source: AMsMyM7hDTo71AcIhzG+IOWZbRcDh4kdE15oJZfFru4jRAk0CN+cc1oyqnCgMyTu8fcg5aLQv8kpgw== X-Received: by 2002:a19:6a05:0:b0:4b0:291b:9487 with SMTP id u5-20020a196a05000000b004b0291b9487mr12680096lfu.623.1667565924980; Fri, 04 Nov 2022 05:45:24 -0700 (PDT) Received: from [10.27.10.248] ([195.165.23.90]) by smtp.gmail.com with ESMTPSA id x23-20020ac24897000000b0048aee825e2esm445984lfc.282.2022.11.04.05.45.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Nov 2022 05:45:24 -0700 (PDT) Message-ID: Date: Fri, 4 Nov 2022 15:45:23 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v2 3/8] dt-bindings: display/msm: add support for the display on SM8450 Content-Language: en-GB To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20221102231309.583587-1-dmitry.baryshkov@linaro.org> <20221102231309.583587-4-dmitry.baryshkov@linaro.org> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 03/11/2022 17:03, Krzysztof Kozlowski wrote: > On 02/11/2022 19:13, Dmitry Baryshkov wrote: >> Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm >> SM8450 platform. >> >> Signed-off-by: Dmitry Baryshkov >> --- >> .../bindings/display/msm/qcom,sm8450-dpu.yaml | 132 +++++++ >> .../display/msm/qcom,sm8450-mdss.yaml | 349 ++++++++++++++++++ >> 2 files changed, 481 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml >> create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml >> [skipped] >> + >> +$ref: /schemas/display/msm/mdss-common.yaml# >> + >> +properties: >> + compatible: >> + items: [skipped] >> + >> + clock-names: >> + items: >> + - const: iface >> + - const: bus >> + - const: nrt_bus >> + - const: core >> + >> + iommus: >> + maxItems: 1 >> + >> + interconnects: >> + maxItems: 2 >> + >> + interconnect-names: >> + maxItems: 2 > > You need specific names here. > The names are described in mdss-common.yaml -- With best wishes Dmitry