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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id x17-20020a5d6511000000b0031fd849e797sm24550153wru.105.2023.09.30.15.53.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 30 Sep 2023 15:53:30 -0700 (PDT) Message-ID: Date: Sat, 30 Sep 2023 23:53:29 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/5] clk: qcom: camcc-sc8280xp: Add sc8280xp CAMCC Content-Language: en-US To: Konrad Dybcio , Bryan O'Donoghue , andersson@kernel.org, agross@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, jonathan@marek.ca, quic_tdas@quicinc.com, vladimir.zapolskiy@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230930134114.1816590-1-bryan.odonoghue@linaro.org> <20230930134114.1816590-5-bryan.odonoghue@linaro.org> From: Bryan O'Donoghue In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On 30/09/2023 17:39, Konrad Dybcio wrote: > >> +static struct clk_branch camcc_gdsc_clk = { >> +    .halt_reg = 0xc1e4, >> +    .halt_check = BRANCH_HALT, >> +    .clkr = { >> +        .enable_reg = 0xc1e4, >> +        .enable_mask = BIT(0), >> +        .hw.init = &(struct clk_init_data){ >> +            .name = "camcc_gdsc_clk", >> +            .parent_hws = (const struct clk_hw*[]){ >> +                &camcc_xo_clk_src.clkr.hw, >> +            }, >> +            .num_parents = 1, >> +            .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, > "meh" > > Is this clock only necessary for the GDSC to turn on? Most of this code is autogenerated in downstream as I understand it a script is run against some definition the RTL one would hope. I think that is probably how the gdsc clocks for the camcc are marked like this upstream already too. grep CRITICAL drivers/clk/qcom/*camcc* drivers/clk/qcom/camcc-sc7280.c: .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, drivers/clk/qcom/camcc-sm8250.c: .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, drivers/clk/qcom/camcc-sm8450.c: .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, I can tell you what clocks this clock but I can't tell you where that clock routes too, so the best/only source of information I have is the flag that comes from the autogenerated downstream code. I think the safe thing to do is to leave the flag as is TBH. --- bod