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From: Robin Murphy <robin.murphy@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Rob Herring <robh@kernel.org>
Cc: Chris Morgan <macromorgan@hotmail.com>,
	Ryan Walklin <ryan@testtoast.com>,
	iommu@lists.linux.dev, devicetree@vger.kernel.org,
	linux-sunxi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/5] iommu: sun50i: allocate page tables from below 4 GiB
Date: Fri, 31 May 2024 09:37:02 +0100	[thread overview]
Message-ID: <ecdc4d9f-a7b4-45e1-a870-e97cf4922539@arm.com> (raw)
In-Reply-To: <20240530233800.27705-3-andre.przywara@arm.com>

On 2024-05-31 12:37 am, Andre Przywara wrote:
> The Allwinner IOMMU is a strict 32-bit device, with the page table root
> pointer as well as both level's page tables and also the target addresses
> all required to be below 4GB.
> The Allwinner H6 SoC only supports 32-bit worth of physical addresses
> anyway, so this isn't a problem so far, but the H616 and later SoCs extend
> the PA space beyond 32 bit to accommodate more DRAM.
> To make sure we stay within the 32-bit PA range required by the IOMMU,
> force the memory for the page tables to come from below 4GB. by using
> allocations with the DMA32 flag.

Uh-oh... what about the output addresses in sun50i_mk_pte()? Limiting 
its own accesses is OK, but if the IOMMU isn't capable of *mapping* any 
valid PA for its clients, we can't easily support that.

Thanks,
Robin.

> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>   drivers/iommu/sun50i-iommu.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c
> index dd3f07384624c..c3244db5ac02f 100644
> --- a/drivers/iommu/sun50i-iommu.c
> +++ b/drivers/iommu/sun50i-iommu.c
> @@ -682,7 +682,8 @@ sun50i_iommu_domain_alloc_paging(struct device *dev)
>   	if (!sun50i_domain)
>   		return NULL;
>   
> -	sun50i_domain->dt = iommu_alloc_pages(GFP_KERNEL, get_order(DT_SIZE));
> +	sun50i_domain->dt = iommu_alloc_pages(GFP_KERNEL | GFP_DMA32,
> +					      get_order(DT_SIZE));
>   	if (!sun50i_domain->dt)
>   		goto err_free_domain;
>   
> @@ -997,7 +998,7 @@ static int sun50i_iommu_probe(struct platform_device *pdev)
>   
>   	iommu->pt_pool = kmem_cache_create(dev_name(&pdev->dev),
>   					   PT_SIZE, PT_SIZE,
> -					   SLAB_HWCACHE_ALIGN,
> +					   SLAB_HWCACHE_ALIGN | SLAB_CACHE_DMA32,
>   					   NULL);
>   	if (!iommu->pt_pool)
>   		return -ENOMEM;

  reply	other threads:[~2024-05-31  8:37 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-30 23:37 [PATCH 0/5] iommu: sun50i: Add Allwinner H616 support Andre Przywara
2024-05-30 23:37 ` [PATCH 1/5] iommu: sun50i: clear bypass register Andre Przywara
2024-05-30 23:37 ` [PATCH 2/5] iommu: sun50i: allocate page tables from below 4 GiB Andre Przywara
2024-05-31  8:37   ` Robin Murphy [this message]
2024-05-31 10:02     ` Andre Przywara
2024-05-31 11:00       ` Robin Murphy
2024-05-30 23:37 ` [PATCH 3/5] dt-bindings: iommu: add new compatible strings Andre Przywara
2024-05-31 10:17   ` Krzysztof Kozlowski
2024-05-30 23:37 ` [PATCH 4/5] iommu: sun50i: Add H616 compatible string Andre Przywara
2024-05-30 23:38 ` [PATCH 5/5] arm64: dts: allwinner: h616: add IOMMU node Andre Przywara
2024-05-31  8:42   ` Robin Murphy
2024-05-31  9:32     ` Andre Przywara
2024-05-31  9:45       ` Robin Murphy
2024-05-31 10:24         ` Andre Przywara

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