From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Akhil P Oommen <quic_akhilpo@quicinc.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte
Date: Mon, 17 Feb 2025 10:15:06 +0000 [thread overview]
Message-ID: <ed1952e4-697f-40e1-a878-d8f9d34f3176@linaro.org> (raw)
In-Reply-To: <20250109-sar2130p-nvmem-v4-1-633739fe5f11@linaro.org>
On 09/01/2025 04:35, Dmitry Baryshkov wrote:
> If the NVMEM specifies a stride to access data, reading particular cell
> might require bit offset that is bigger than one byte. Rework NVMEM core
> code to support bit offsets of more than 8 bits.
If the plan is to support bit offset above 8 bits, please update
./Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml to
reflect this too.
--srini
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/nvmem/core.c | 24 +++++++++++++++++-------
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
> index d6494dfc20a7324bde6415776dcabbb0bfdd334b..7fa85b0804db360035d7471002dbf79658d5830b 100644
> --- a/drivers/nvmem/core.c
> +++ b/drivers/nvmem/core.c
> @@ -834,7 +834,9 @@ static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_nod
> if (addr && len == (2 * sizeof(u32))) {
> info.bit_offset = be32_to_cpup(addr++);
> info.nbits = be32_to_cpup(addr);
> - if (info.bit_offset >= BITS_PER_BYTE || info.nbits < 1) {
> + if (info.bit_offset >= BITS_PER_BYTE * info.bytes ||
> + info.nbits < 1 ||
> + info.bit_offset + info.nbits > BITS_PER_BYTE * info.bytes) {
> dev_err(dev, "nvmem: invalid bits on %pOF\n", child);
> of_node_put(child);
> return -EINVAL;
> @@ -1627,21 +1629,29 @@ EXPORT_SYMBOL_GPL(nvmem_cell_put);
> static void nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell, void *buf)
> {
> u8 *p, *b;
> - int i, extra, bit_offset = cell->bit_offset;
> + int i, extra, bytes_offset;
> + int bit_offset = cell->bit_offset;
>
> p = b = buf;
> - if (bit_offset) {
> +
> + bytes_offset = bit_offset / BITS_PER_BYTE;
> + b += bytes_offset;
> + bit_offset %= BITS_PER_BYTE;
> +
> + if (bit_offset % BITS_PER_BYTE) {
> /* First shift */
> - *b++ >>= bit_offset;
> + *p = *b++ >> bit_offset;
>
> /* setup rest of the bytes if any */
> for (i = 1; i < cell->bytes; i++) {
> /* Get bits from next byte and shift them towards msb */
> - *p |= *b << (BITS_PER_BYTE - bit_offset);
> + *p++ |= *b << (BITS_PER_BYTE - bit_offset);
>
> - p = b;
> - *b++ >>= bit_offset;
> + *p = *b++ >> bit_offset;
> }
> + } else if (p != b) {
> + memmove(p, b, cell->bytes - bytes_offset);
> + p += cell->bytes - 1;
> } else {
> /* point to the msb */
> p += cell->bytes - 1;
>
next prev parent reply other threads:[~2025-02-17 10:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-09 4:35 [PATCH v4 0/5] nvmem: qfprom: add Qualcomm SAR2130P support Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 1/5] nvmem: core: fix bit offsets of more than one byte Dmitry Baryshkov
2025-02-04 23:40 ` Dmitry Baryshkov
2025-02-17 10:15 ` Srinivas Kandagatla [this message]
2025-01-09 4:35 ` [PATCH v4 2/5] nvmem: core: verify cell's raw_len Dmitry Baryshkov
2025-02-19 14:51 ` Mark Brown
2025-02-19 15:14 ` Dmitry Baryshkov
2025-02-20 14:18 ` Mark Brown
2025-02-20 15:50 ` Dmitry Baryshkov
2025-02-20 19:12 ` Mark Brown
2025-01-09 4:35 ` [PATCH v4 3/5] nvmem: core: update raw_len if the bit reading is required Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 4/5] nvmem: qfprom: switch to 4-byte aligned reads Dmitry Baryshkov
2025-01-09 4:35 ` [PATCH v4 5/5] dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible Dmitry Baryshkov
2025-02-04 16:55 ` Rob Herring
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