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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4532f2ca228sm42833945e9.13.2025.06.13.01.29.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Jun 2025 01:29:12 -0700 (PDT) Message-ID: Date: Fri, 13 Jun 2025 09:29:10 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] dt-bindings: media: Describe Qualcomm SM8650 CAMSS IP To: Vladimir Zapolskiy , Robert Foss , Todor Tomov , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio Cc: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20250423221954.1926453-1-vladimir.zapolskiy@linaro.org> <20250423221954.1926453-2-vladimir.zapolskiy@linaro.org> Content-Language: en-US From: Bryan O'Donoghue In-Reply-To: <20250423221954.1926453-2-vladimir.zapolskiy@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 23/04/2025 23:19, Vladimir Zapolskiy wrote: > Add device tree bindings for Qualcomm SM8650 camera subsystem. > > Signed-off-by: Vladimir Zapolskiy > --- > .../bindings/media/qcom,sm8650-camss.yaml | 394 ++++++++++++++++++ > 1 file changed, 394 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml > > diff --git a/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml > new file mode 100644 > index 000000000000..2a7c243993c4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml > @@ -0,0 +1,394 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,sm8650-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SM8650 Camera Subsystem (CAMSS) > + > +maintainers: > + - Vladimir Zapolskiy > + > +description: > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,sm8650-camss > + > + reg: > + maxItems: 17 > + > + reg-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite0 > + - const: csid_lite1 > + - const: csid_wrapper > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: csiphy4 > + - const: csiphy5 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite0 > + - const: vfe_lite1 > + > + clocks: > + maxItems: 36 > + > + clock-names: > + items: > + - const: camnoc_axi_nrt > + - const: camnoc_axi_rt > + - const: cpas_ahb > + - const: cpas_fast_ahb > + - const: cpas_vfe0 > + - const: cpas_vfe1 > + - const: cpas_vfe2 > + - const: cpas_vfe_lite > + - const: csid > + - const: csiphy0 > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer > + - const: csiphy3 > + - const: csiphy3_timer > + - const: csiphy4 > + - const: csiphy4_timer > + - const: csiphy5 > + - const: csiphy5_timer > + - const: csiphy_rx > + - const: gcc_ahb_clk > + - const: gcc_axi_hf > + - const: gcc_axi_sf > + - const: qdss_debug_xo > + - const: vfe0 > + - const: vfe0_fast_ahb > + - const: vfe1 > + - const: vfe1_fast_ahb > + - const: vfe2 > + - const: vfe2_fast_ahb > + - const: vfe_lite > + - const: vfe_lite_ahb > + - const: vfe_lite_cphy_rx > + - const: vfe_lite_csid > + > + interrupts: > + maxItems: 16 > + > + interrupt-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite0 > + - const: csid_lite1 > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: csiphy4 > + - const: csiphy5 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite0 > + - const: vfe_lite1 > + > + iommus: > + maxItems: 3 > + > + interconnects: > + maxItems: 2 > + > + interconnect-names: > + items: > + - const: ahb > + - const: hf_0_mnoc > + > + power-domains: > + items: > + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller. > + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: ife2 > + - const: top > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + patternProperties: > + "^port@[0-5]$": > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + > + description: > + Input port for receiving CSI data from a CSIPHY. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + clock-lanes: > + maxItems: 1 > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - clock-lanes > + - data-lanes > + > + vdda-csi01-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY0 and CSIPHY1 IP blocks. > + > + vdda-csi24-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY2 and CSIPHY4 IP blocks. > + > + vdda-csi35-0p9-supply: > + description: > + Phandle to a 0.9V regulator supply to CSIPHY3 and CSIPHY5 IP blocks. > + > + vdda-csi01-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY0 and CSIPHY1 IP blocks. > + > + vdda-csi24-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY2 and CSIPHY4 IP blocks. > + > + vdda-csi35-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY3 and CSIPHY5 IP blocks. I think we should just do this + vdd-csiphy-0p8-supply: + description: + Phandle to a 0.8V regulator supply to a PHY. + + vdd-csiphy-1p2-supply: + description: + Phandle to 1.8V regulator supply to a PHY. and loop back to add multiple rails later. Please consider doing a V3 of this along these lines so we can unblock this submission. --- bod