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Fri, 05 Dec 2025 06:05:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IGAgA9orODpp4Rjh7ULin/QPXV8ZFFMmR+nawulDJMB+XXWkFsNYSBrBeiA5YYZFPjA+0UAQQ== X-Received: by 2002:a05:6a20:3d0f:b0:366:14af:9bbe with SMTP id adf61e73a8af0-36614af9c79mr270635637.72.1764943555822; Fri, 05 Dec 2025 06:05:55 -0800 (PST) Received: from [192.168.1.4] ([106.222.235.197]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-bf6a2746f95sm5001184a12.30.2025.12.05.06.05.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Dec 2025 06:05:55 -0800 (PST) Message-ID: Date: Fri, 5 Dec 2025 19:35:48 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/6] arm64: dts: qcom: sm6150: Add gpu and rgmu nodes To: Konrad Dybcio , Dmitry Baryshkov Cc: Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Jessica Zhang , Dan Carpenter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jie Zhang References: <20251122-qcs615-spin-2-v3-0-9f4d4c87f51d@oss.qualcomm.com> <20251122-qcs615-spin-2-v3-5-9f4d4c87f51d@oss.qualcomm.com> <8560ad26-4756-4c2a-97c3-2c5c0695172c@oss.qualcomm.com> <6fa1da5d-9ea7-4d72-a03a-82edc4bef099@oss.qualcomm.com> <9141e67d-2837-4e73-bd3a-9a9c5b8f72f9@oss.qualcomm.com> <6dc39f3e-0a2f-42ca-a088-4b62a8153001@oss.qualcomm.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: <6dc39f3e-0a2f-42ca-a088-4b62a8153001@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=DOSCIiNb c=1 sm=1 tr=0 ts=6932e6c5 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=jBSxni06C9HboLYAjQ55wg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=OEjwK6i1zzq-GUtPt80A:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: C1Xs6O4ELgq0oA8Y1W6kjuy23uoJ02zc X-Proofpoint-GUID: C1Xs6O4ELgq0oA8Y1W6kjuy23uoJ02zc X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA1MDEwMSBTYWx0ZWRfXz77W4/9IVV3g Bn9sMN5J8zyTkMhXhqZjH0B7DWMga3K5Nm0QeHO/K29EBFu3z2JlCZPGrNLkHMv9HZ2BrLYvlJX wmKOhUA6BwMnttiwbaSsSrOIYcrbJDjV+Yb2erdN0r9sQ4O0AWJY46mWWtVtiNx8uAWVjXkkgu6 qf3+9DVWelWVE8wLjo4TWNtALubYFbWur/fYWZTq3Q+YssdDdrRgPyajO817cWu9WiFMc8gIBLs 1HPqkudaQBpfMPq5WoDhUZjkWQss3gif0guO6JsmJWbWgfz/g1fUL7p4y55OFMhEWEBe070RoRQ 4K0mJCtF5sS/apCIIXEHFNRCJfpUG59SRYsGPKLnfXSpGuiTtXxtarvhkXtcIWazR8pbnPsW4Kv XLYjMGEcsqFpBXVBuNjd9+O3SERGKg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-05_05,2025-12-04_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 spamscore=0 phishscore=0 impostorscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512050101 On 12/5/2025 7:22 PM, Konrad Dybcio wrote: > On 12/5/25 2:41 PM, Akhil P Oommen wrote: >> On 12/4/2025 7:01 PM, Konrad Dybcio wrote: >>> On 12/4/25 11:13 AM, Akhil P Oommen wrote: >>>> On 11/26/2025 6:12 AM, Dmitry Baryshkov wrote: >>>>> On Sat, Nov 22, 2025 at 03:03:10PM +0100, Konrad Dybcio wrote: >>>>>> On 11/21/25 10:52 PM, Akhil P Oommen wrote: >>>>>>> From: Jie Zhang >>>>>>> >>>>>>> Add gpu and rgmu nodes for qcs615 chipset. >>>>>>> >>>>>>> Signed-off-by: Jie Zhang >>>>>>> Signed-off-by: Akhil P Oommen >>>>>>> --- >>>>>> >>>>>> [...] >>>>>> >>>>>>> + gpu_opp_table: opp-table { >>>>>>> + compatible = "operating-points-v2"; >>>>>>> + >>>>>>> + opp-845000000 { >>>>>>> + opp-hz = /bits/ 64 <845000000>; >>>>>>> + required-opps = <&rpmhpd_opp_turbo>; >>>>>>> + opp-peak-kBps = <7050000>; >>>>>>> + }; >>>>>> >>>>>> I see another speed of 895 @ turbo_l1, perhaps that's for speedbins >>>>>> or mobile parts specifically? >>>>> >>>>> msm-4.14 defines 7 speedbins for SM6150. Akhil, I don't see any of them >>>>> here. >>>> >>>> The IoT/Auto variants have a different frequency plan compared to the >>>> mobile variant. I reviewed the downstream code and this aligns with that >>>> except the 290Mhz corner. We can remove that one. >>>> >>>> Here we are describing the IoT variant of Talos. So we can ignore the >>>> speedbins from the mobile variant until that is supported. >>> >>> Writing this reply took probably only slightly less time than fixing >>> the issue.. I really see no point in kicking the can down the road >> >> We don't know the speedbin fuse register and the values applicable for >> this IoT chipset. Currently, there is only a single variant and no SKUs >> for this chipset. We can add them when those decisions are taken by the >> relevant folks from Product team. > > If there's only a single variant right now, could you simply read back > the value and report it where necessary to make sure the internal teams > are aware? > > There's surely *some* value fused into the cell.. We don't know which register to read at the moment. It could be the hard fuse register or some soft fuse register at an arbitrary location. It is better to leave it as it is for now. Who knows, maybe there won't any SKUs at all. -Akhil > > Konrad