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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3954de0f48esm1673404a91.0.2026.08.18.00.35.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Aug 2026 00:35:43 -0700 (PDT) Message-ID: Date: Tue, 18 Aug 2026 15:35:38 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] soc: qcom: ice: Enable PM runtime for ICE driver From: Linlin Zhang To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Herbert Xu , "David S . Miller" , devicetree@vger.kernel.org, linux-crypto@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Neeraj Soni , Deepti Jaggi , bjorn.andersson@oss.qualcomm.com References: <20260512033750.3393050-1-linlin.zhang@oss.qualcomm.com> <20260512033750.3393050-3-linlin.zhang@oss.qualcomm.com> <01578e6a-d10a-46df-bb32-fd45ecb365d7@oss.qualcomm.com> <60b775b0-5482-4b95-b37e-ba5764efc0cf@oss.qualcomm.com> Content-Language: en-US In-Reply-To: <60b775b0-5482-4b95-b37e-ba5764efc0cf@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE4MDA1NSBTYWx0ZWRfX/tMTFNtXXrWi dXo3xze84SsH1zK7L3o1XP+ynYXh7t3FdWt633tsAL4+EheO5bgoauyqq1k0A/wCmVHa9uPI8at +Ejie/jSVehbBN8FtRmE7TzbdpNLX8MCCVIHCNP/RBQ7dQFRetGbC8DGECGoNioEkj0168yWB6z vsdvqhxpVwF/hfm6K3T/1dSb7HrLqt3pIukc9URzo/Yz0vv9IdX3gmMeF1tgbGg6qNrHe8tV/qG Ye3MsDA2uxlQkn+Q7BSrpq2fZo7BJRcPzYAyaO6zfF9wb9AuyevnINuL1uWJwT9rF/IVMq1V1X/ XIg8hvXfNrtSasuiUe1Q7HfCw3Kj//RXQVfodlQz1LyHsvHrsPOlRJlZOOK8UwsZrTnheXxeydU AZh121uCTDNV8cWUMy8OAh25+gZVp6s4bZP0RUpU/K1iltI5p7Ka5ngO+0bLZOJMEXQJ5i5FXxj HNkGdIIjPtNKBwB5lpQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwODE4MDA1NSBTYWx0ZWRfX7X1RGs04zITt Cn5CkWm2CFDQTlBmT843MBx8ohBDYDgJinHteTlAyTyI19paHH3/1m78fcmTcRJcfraZWYCRcwb CJKorImaf/GTklnYvt93LlrgP/nS07M= X-Authority-Analysis: v=2.4 cv=XtfK/1F9 c=1 sm=1 tr=0 ts=6a840b51 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=zdAPh6cMWLyj7RvgIaUA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: A9RHncuh9uu3utC29tOHpocu1zj1bULr X-Proofpoint-GUID: A9RHncuh9uu3utC29tOHpocu1zj1bULr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-17_04,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 suspectscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608180055 On 8/18/2026 3:30 PM, Linlin Zhang wrote: > > > On 5/15/2026 10:48 PM, Krzysztof Kozlowski wrote: >> On 15/05/2026 16:22, Linlin Zhang wrote: >>> >>> Hi Krzysztof, >>> >>> Thanks for the review. >>> >>> For the SCMI-based platforms (e.g. sa8255p), the ICE resources such as >>> clocks are not controlled directly by the ICE driver. Instead, they are >>> managed by remote firmware and exposed to Linux via power domains. As a >>> result, the ICE driver cannot use clk_prepare_enable() directly to >>> control the hardware clock. >>> >>> The intention of moving the clock handling into runtime PM callbacks is >>> to align the ICE driver with the power domain framework used on these >>> platforms. When the ICE device is attached to a power domain, invoking >>> pm_runtime_resume_and_get() will trigger the provider (remote firmware >>> via SCMI) to power up the device, which in turn enables the underlying >>> clock and other resources. >>> >>> This design follows the guidance where the runtime PM framework is >>> used as the common mechanism to abstract both: >>> - direct clock control on non-SCMI platforms, and >>> - firmware-controlled resources via power domains on SCMI platforms. >>> >>> In both cases, the runtime PM callbacks are responsible for performing >>> the actual resource enable/disable: >>> - for legacy platforms: clk_prepare_enable()/disable_unprepare() >>> - for SCMI platforms: power domain on/off handled by firmware >>> >>> So while it may look like an additional layer on legacy platforms, this >>> approach provides a unified mechanism without requiring separate driver >>> entry points or special handling in the upper layers (e.g. UFS driver). >>> >>> That said, I understand your concern that introducing runtime PM solely >>> for clock gating can be seen as unnecessary overhead on existing >>> platforms. I will revisit the implementation to ensure that: >>> - the runtime PM integration does not introduce regressions for legacy >>> platforms, and >>> - the design clearly justifies the common abstraction for both SCMI >>> and non-SCMI cases. >>> >>> In addition, I rewrite the commit message as the following to make the >>> intention more clear. >>> >>> On some platforms the ICE device is placed in a firmware-managed power >>> domain. In those cases the ICE core resources (including the clock) are >>> not directly controllable by Linux and are instead toggled by the power >>> domain provider (e.g. remote firmware via SCMI). >>> >>> Wire the ICE device into runtime PM so that a single pm_runtime >>> transition is used to bring the ICE device up/down. When the device is >>> attached to a PM domain, pm_runtime_resume_and_get()/pm_runtime_put_sync() >>> will invoke the PM domain callbacks and let the provider manage the >>> resources. On platforms without a PM domain the runtime PM callbacks >>> continue to perform the existing clock enable/disable locally. >>> >>> No functional change is intended for non-firmware-managed platforms; the >>> change provides a common control point that allows ICE to operate when >>> resources are owned by a PM domain provider. >>> >> >> >> Nothing here resolves the comments. Also, it's top posted. Honestly, I >> won't be talking through you with LLM, so consider patch NAKed. >> >> Best regards, >> Krzysztof > > Sorry for the late due to personal matters. > > At that time, I reviewed your comments one by one and provided answers, then > let AI polish the answer. > > I'll add new replies after your comments point by point. > > Thanks for the review. > Alternatively, if you would prefer to review a revised patch series that incorporates the changes we have already agreed upon for patches 0/3 and 1/3, please let me know and I would be happy to prepare it. Thanks