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Mon, 23 Feb 2026 15:51:57 +0100 (CET) Message-ID: Subject: Re: [PATCH] arm64: dts: rockchip: Fix vdec register blocks order on RK3576 From: Nicolas Dufresne To: Cristian Ciocaltea , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Date: Mon, 23 Feb 2026 09:51:55 -0500 In-Reply-To: <20260223-vdec-reg-order-rk3576-v1-1-560976566bd3@collabora.com> References: <20260223-vdec-reg-order-rk3576-v1-1-560976566bd3@collabora.com> Autocrypt: addr=nicolas.dufresne@collabora.com; prefer-encrypt=mutual; keydata=mDMEaCN2ixYJKwYBBAHaRw8BAQdAM0EHepTful3JOIzcPv6ekHOenE1u0vDG1gdHFrChD /e0J05pY29sYXMgRHVmcmVzbmUgPG5pY29sYXNAbmR1ZnJlc25lLmNhPoicBBMWCgBEAhsDBQsJCA cCAiICBhUKCQgLAgQWAgMBAh4HAheABQkJZfd1FiEE7w1SgRXEw8IaBG8S2UGUUSlgcvQFAmibrjo CGQEACgkQ2UGUUSlgcvQlQwD/RjpU1SZYcKG6pnfnQ8ivgtTkGDRUJ8gP3fK7+XUjRNIA/iXfhXMN abIWxO2oCXKf3TdD7aQ4070KO6zSxIcxgNQFtDFOaWNvbGFzIER1ZnJlc25lIDxuaWNvbGFzLmR1Z nJlc25lQGNvbGxhYm9yYS5jb20+iJkEExYKAEECGwMFCwkIBwICIgIGFQoJCAsCBBYCAwECHgcCF4 AWIQTvDVKBFcTDwhoEbxLZQZRRKWBy9AUCaCyyxgUJCWX3dQAKCRDZQZRRKWBy9ARJAP96pFmLffZ smBUpkyVBfFAf+zq6BJt769R0al3kHvUKdgD9G7KAHuioxD2v6SX7idpIazjzx8b8rfzwTWyOQWHC AAS0LU5pY29sYXMgRHVmcmVzbmUgPG5pY29sYXMuZHVmcmVzbmVAZ21haWwuY29tPoiZBBMWCgBBF iEE7w1SgRXEw8IaBG8S2UGUUSlgcvQFAmibrGYCGwMFCQll93UFCwkIBwICIgIGFQoJCAsCBBYCAw ECHgcCF4AACgkQ2UGUUSlgcvRObgD/YnQjfi4+L8f4fI7p1pPMTwRTcaRdy6aqkKEmKsCArzQBAK8 bRLv9QjuqsE6oQZra/RB4widZPvphs78H0P6NmpIJ Organization: Collabora Canada Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-RHGQesk7FfUtbqUrU2bL" User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 --=-RHGQesk7FfUtbqUrU2bL Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Cristian, Le lundi 23 f=C3=A9vrier 2026 =C3=A0 14:25 +0200, Cristian Ciocaltea a =C3= =A9crit=C2=A0: > When building device trees for the RK3576 based boards, DTC shows the > following complaint: >=20 > =C2=A0 rk3576.dtsi:1282.30-1304.5: Warning (simple_bus_reg): > /soc/video-codec@27b00000: simple-bus unit address format error, expected > "27b00100" >=20 > Provide the register blocks in the expected address-based order. >=20 > Fixes: da0de806d8b4 ("arm64: dts: rockchip: Add the vdpu383 Video Decoder= on > rk3576") > Signed-off-by: Cristian Ciocaltea > --- > =C2=A0arch/arm64/boot/dts/rockchip/rk3576.dtsi | 6 +++--- > =C2=A01 file changed, 3 insertions(+), 3 deletions(-) >=20 > diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi > b/arch/arm64/boot/dts/rockchip/rk3576.dtsi > index 49ccdf12ef7e..45eb0d053a6f 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi > @@ -1281,10 +1281,10 @@ gpu: gpu@27800000 { > =C2=A0 > =C2=A0 vdec: video-codec@27b00000 { > =C2=A0 compatible =3D "rockchip,rk3576-vdec"; > - reg =3D <0x0 0x27b00100 0x0 0x500>, > - =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <0x0 0x27b00000 0x0 0x100>, > + reg =3D <0x0 0x27b00000 0x0 0x100>, > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <0x0 0x27b00100 0x0 0x500>, > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <0x0 0x27b00600 0x0 0x100>; > - reg-names =3D "function", "link", "cache"; > + reg-names =3D "link", "function", "cache"; I have a vague memory it was done on purpose, due to the "items" in the bin= dings requiring to follow the same order. I was not enable to run the DT checks t= oday (some pythonic version miss-match issue), but wanted to raise the flag. Nicolas > =C2=A0 interrupts =3D ; > =C2=A0 clocks =3D <&cru ACLK_RKVDEC_ROOT>, <&cru HCLK_RKVDEC>, > =C2=A0 <&cru ACLK_RKVDEC_ROOT_BAK>, <&cru > CLK_RKVDEC_CORE>, >=20 > --- > base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f > change-id: 20260223-vdec-reg-order-rk3576-cc2ec6e05e98 --=-RHGQesk7FfUtbqUrU2bL Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTvDVKBFcTDwhoEbxLZQZRRKWBy9AUCaZxpiwAKCRDZQZRRKWBy 9F6GAP9sK3LNgp3i/RTPemPHdl3OCWbtObnfVIAxjEF8QC7QOwD+MUegoEjbLFvL vLDQK4lHUUSmK7/+64xIuuaw9QZJrQo= =WXgQ -----END PGP SIGNATURE----- --=-RHGQesk7FfUtbqUrU2bL--