From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35FE737DAD5; Mon, 6 Jul 2026 19:44:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783367082; cv=none; b=TVBykELa9otTtuqc68czB9znpPUB2+RCywiw/7thLzW4O2iZC8eTDhb7DrhwZAKbnw5wIi1/ln/wxj+F4cMB4cMT9b6/1NGTG3ZBwesX5fF/mUM7+vqHCgi3MkQcD6afb+U6Toe+keWRFZZBrLAnSkIJcN+JyBVK9NLwEeex5sQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783367082; c=relaxed/simple; bh=CWZhUJcYoDkhoYtK1iatbsomPrNsu3GgiD409MrmM4g=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=mQf85VJJ+qxpHy9q2iyUCJ2CfE3b7YSHwZaPXu1gwfEse9Uturd2vu06ClUC7oH4VArkvpN4W9yEcpHBjGYG/jZaGRPV/aKtLTTT+K2uoJjfvMBDDKdCUWKX8TUVTkfR5+Rp5E/0/ShKdMfeji5g6+gpttyjiI7WOlfoxNYUnVg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=VO2c7dgq; arc=none smtp.client-ip=80.241.56.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="VO2c7dgq" Received: from smtp102.mailbox.org (smtp102.mailbox.org [IPv6:2001:67c:2050:b231:465::102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA512) (No client certificate requested) by mout-p-201.mailbox.org (Postfix) with ESMTPS id 4gvFDZ4ZGxzMl25; Mon, 06 Jul 2026 21:44:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1783367070; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yYL7G2us8L1A+ywgdNGttIZPW1DvpTtJ3gvCDvIiAEc=; b=VO2c7dgq1MlQPUau1AxNghnke1EnVjyqyONihaOOagbxdtH7hnbBl0ef44m9glBZA9MnBQ Bf0sAgfdYvLUGJZKMAx5vyLPknKXvEeapulY06qgaRv/U0BirpZWU0G7r9eNLlxvHyb2KZ 4TD/ogmzgIMmGzrMldg5gjBneQt+9EkGzCD2z7tuDLMYbXqClgf981BbmWPJoBiXixh/NS GgPyVtexk1r082Q/xjJMUmNzJBiIAOCtP7sLubSirZJKLPUs/A12/GsO0vtu8OZLv5t8JO xptbQjHsXSOVZNpmGV0iVCPAs2o3znZQ2+uQje1hsytLY+T2dNQz43ryIabXww== Message-ID: Date: Mon, 6 Jul 2026 15:06:01 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH 2/2] gpio: rcar: Add R-Car X5H (R8A78000) support To: Bartosz Golaszewski Cc: Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Linus Walleij , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org References: <20260704151521.211335-1-marek.vasut+renesas@mailbox.org> <20260704151521.211335-2-marek.vasut+renesas@mailbox.org> Content-Language: en-US From: Marek Vasut In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-MBO-RS-META: e5aod8a9sremupnu97iu3hz4ksycwump X-MBO-RS-ID: c857a6e774d5f1b558b On 7/6/26 11:19 AM, Bartosz Golaszewski wrote: Hello Bartosz, >> +static inline int gpio_rcar_remap_offset(struct gpio_rcar_priv *p, int *offs) >> +{ I am hoping to get some input on this remap function. >> + /* R-Car Gen4 and older do not need any offset remap. */ >> + if (!p->info.has_layout_gen5) >> + return 0; >> + >> + /* >> + * R-Car Gen5 register layout is slightly different and the offsets >> + * that have to be added to or subtracted from each register offset >> + * can be divided into five groups, listed below. >> + */ >> + switch (*offs) { >> + case IOINTSEL...OUTDT: >> + return 0; >> + case INDT: >> + *offs += 0x10; >> + return 0; >> + case INTDT...EDGLEVEL: >> + fallthrough; >> + case BOTHEDGE: >> + *offs += 0x70; >> + return 0; >> + case OUTDTSEL: >> + *offs -= 0x34; >> + return 0; >> + case INEN: >> + *offs -= 0x38; >> + return 0; >> + default: >> + /* >> + * This here must never be reached, if this is reached, that >> + * means there is a catastrophic failure in the driver. Skip >> + * any IO read/write to prevent further damage. >> + */ >> + WARN_ON(1); >> + return -EINVAL; >> + } >> +} >> + [...] >> @@ -399,6 +445,7 @@ static const struct gpio_rcar_info gpio_rcar_info_gen1 = { >> .has_both_edge_trigger = false, >> .has_always_in = false, >> .has_inen = false, >> + .has_layout_gen5 = false, >> }; >> >> static const struct gpio_rcar_info gpio_rcar_info_gen2 = { >> @@ -406,6 +453,7 @@ static const struct gpio_rcar_info gpio_rcar_info_gen2 = { >> .has_both_edge_trigger = true, >> .has_always_in = false, >> .has_inen = false, >> + .has_layout_gen5 = false, >> }; >> >> static const struct gpio_rcar_info gpio_rcar_info_gen3 = { >> @@ -413,6 +461,7 @@ static const struct gpio_rcar_info gpio_rcar_info_gen3 = { >> .has_both_edge_trigger = true, >> .has_always_in = true, >> .has_inen = false, >> + .has_layout_gen5 = false, >> }; >> >> static const struct gpio_rcar_info gpio_rcar_info_gen4 = { >> @@ -420,6 +469,15 @@ static const struct gpio_rcar_info gpio_rcar_info_gen4 = { >> .has_both_edge_trigger = true, >> .has_always_in = true, >> .has_inen = true, >> + .has_layout_gen5 = false, > > This looks good but do we really need to change these lines if it's zeroes > anyway? I'm just following the pattern in the driver, which does full assignment of all fields for all generations of the controller. See .has_inen = false in Gen1 for example. We don't have to do the assignment, but maybe doing so is more comprehensible ? -- Best regards, Marek Vasut