Re: [PATCH v2 3/8] dt-bindings: display/msm: add support for the display on SM8450

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

On 03/11/2022 17:03, Krzysztof Kozlowski wrote:
> On 02/11/2022 19:13, Dmitry Baryshkov wrote:
>> Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
>> SM8450 platform.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>   .../bindings/display/msm/qcom,sm8450-dpu.yaml | 132 +++++++
>>   .../display/msm/qcom,sm8450-mdss.yaml         | 349 ++++++++++++++++++
>>   2 files changed, 481 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml
>>   create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml
>> new file mode 100644
>> index 000000000000..b8c508c50bc5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml
>> @@ -0,0 +1,132 @@
>> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/display/msm/qcom,sm8450-dpu.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm SM8450 Display DPU
>> +
>> +maintainers:
>> +  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> +
>> +$ref: /schemas/display/msm/dpu-common.yaml#
> 
> There is no such file and I could not fine any dependency mentioned in
> cover letter. I guess you miss link to your refactor series?

Excuse me, yes. However the refactoring should be already a part of 
linux-next, so I didn't think that I should especially point to it.

> This also means bot won't be able to test it...

How does bot detects the base commit? Should i use --base? Or does it 
work on top of linux-next?

> 
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sm8450-dpu
>> +
>> +  reg:
>> +    items:
>> +      - description: Address offset and size for mdp register set
>> +      - description: Address offset and size for vbif register set
>> +
>> +  reg-names:
>> +    items:
>> +      - const: mdp
>> +      - const: vbif
>> +
>> +  clocks:
>> +    items:
>> +      - description: Display hf axi clock
>> +      - description: Display sf axi clock
>> +      - description: Display ahb clock
>> +      - description: Display lut clock
>> +      - description: Display core clock
>> +      - description: Display vsync clock
> 
> Drop "clock", less typing.

Ack

> 
>> +
>> +  clock-names:
>> +    items:
>> +      - const: bus
>> +      - const: nrt_bus
>> +      - const: iface
>> +      - const: lut
>> +      - const: core
>> +      - const: vsync
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
>> +    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    #include <dt-bindings/interconnect/qcom,sm8450.h>
>> +    #include <dt-bindings/power/qcom-rpmpd.h>
>> +
>> +    display-controller@ae01000 {
>> +        compatible = "qcom,sm8450-dpu";
>> +        reg = <0x0ae01000 0x8f000>,
>> +              <0x0aeb0000 0x2008>;
>> +        reg-names = "mdp", "vbif";
>> +
>> +        clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
>> +                <&gcc GCC_DISP_SF_AXI_CLK>,
>> +                <&dispcc DISP_CC_MDSS_AHB_CLK>,
>> +                <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
>> +                <&dispcc DISP_CC_MDSS_MDP_CLK>,
>> +                <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
>> +        clock-names = "bus",
>> +                      "nrt_bus",
>> +                      "iface",
>> +                      "lut",
>> +                      "core",
>> +                      "vsync";
>> +
>> +        assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
>> +        assigned-clock-rates = <19200000>;
>> +
>> +        operating-points-v2 = <&mdp_opp_table>;
>> +        power-domains = <&rpmhpd SM8450_MMCX>;
>> +
>> +        interrupt-parent = <&mdss>;
>> +        interrupts = <0>;
>> +
>> +        ports {
>> +            #address-cells = <1>;
>> +            #size-cells = <0>;
>> +
>> +            port@0 {
>> +                reg = <0>;
>> +                dpu_intf1_out: endpoint {
>> +                    remote-endpoint = <&dsi0_in>;
>> +                };
>> +            };
>> +
>> +            port@1 {
>> +                reg = <1>;
>> +                dpu_intf2_out: endpoint {
>> +                    remote-endpoint = <&dsi1_in>;
>> +                };
>> +            };
>> +        };
>> +
>> +        mdp_opp_table: opp-table {
>> +            compatible = "operating-points-v2";
>> +
>> +            opp-172000000{
>> +                opp-hz = /bits/ 64 <172000000>;
>> +                required-opps = <&rpmhpd_opp_low_svs_d1>;
>> +            };
>> +
>> +            opp-200000000 {
>> +                opp-hz = /bits/ 64 <200000000>;
>> +                required-opps = <&rpmhpd_opp_low_svs>;
>> +            };
>> +
>> +            opp-325000000 {
>> +                opp-hz = /bits/ 64 <325000000>;
>> +                required-opps = <&rpmhpd_opp_svs>;
>> +            };
>> +
>> +            opp-375000000 {
>> +                opp-hz = /bits/ 64 <375000000>;
>> +                required-opps = <&rpmhpd_opp_svs_l1>;
>> +            };
>> +
>> +            opp-500000000 {
>> +                opp-hz = /bits/ 64 <500000000>;
>> +                required-opps = <&rpmhpd_opp_nom>;
>> +            };
>> +        };
>> +    };
>> +...
>> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
>> new file mode 100644
>> index 000000000000..05c606e6ada3
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
>> @@ -0,0 +1,349 @@
>> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mdss.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm SM8450 Display MDSS
>> +
>> +maintainers:
>> +  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> +
>> +description:
>> +  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
> 
> Drop "Device tree bindings for" and rewrite the sentence (e.g. drop "that").
> 
>> +  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
>> +  bindings of MDSS are mentioned for SM8450 target.
> 
> Drop last sentence.
> 
>> +
>> +$ref: /schemas/display/msm/mdss-common.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    items:
> 
> Drop items.
> 
>> +      - const: qcom,sm8450-mdss
> 
>> +
>> +  clocks:
>> +    items:
>> +      - description: Display AHB clock from gcc
>> +      - description: Display hf axi clock
>> +      - description: Display sf axi clock
>> +      - description: Display core clock
> 
> Drop trailing "clocks" (the first "AHB clock" is ok)

Hmm, not sure that I understand the difference, but fine with me.

> 
>> +
>> +  clock-names:
>> +    items:
>> +      - const: iface
>> +      - const: bus
>> +      - const: nrt_bus
>> +      - const: core
>> +
>> +  iommus:
>> +    maxItems: 1
>> +
>> +  interconnects:
>> +    maxItems: 2
>> +
>> +  interconnect-names:
>> +    maxItems: 2
> 
> You need specific names here.

Ack

> 
>> +
>> +patternProperties:
>> +  "^display-controller@[0-9a-f]+$":
>> +    type: object
>> +    properties:
>> +      compatible:
>> +        const: qcom,sm8450-dpu
>> +
>> +  "^dsi@[0-9a-f]+$":
>> +    type: object
>> +    properties:
>> +      compatible:
>> +        const: qcom,mdss-dsi-ctrl
>> +
>> +  "^phy@[0-9a-f]+$":
>> +    type: object
>> +    properties:
>> +      compatible:
>> +        const: qcom,dsi-phy-5nm-8450
>> +
>> +unevaluatedProperties: false
> 
> Best regards,
> Krzysztof
> 

-- 
With best wishes
Dmitry