Re: [PATCH] dt-bindings: qcom: geni-se: Fix '#address-cells' & '#size-cells' related dt-binding error

[Bhupesh Sharma <bhupesh.sharma@linaro.org>]

Hi Bjorn,

On 1/19/23 8:53 AM, Bjorn Andersson wrote:
> On Mon, Jan 16, 2023 at 09:13:12PM +0530, Bhupesh Sharma wrote:
>> On Mon, 16 Jan 2023 at 13:23, Krzysztof Kozlowski
>> <krzysztof.kozlowski@linaro.org> wrote:
>>>
>>> On 15/01/2023 22:33, Bhupesh Sharma wrote:
>>>> On Sun, 15 Jan 2023 at 20:57, Krzysztof Kozlowski
>>>> <krzysztof.kozlowski@linaro.org> wrote:
>>>>>
>>>>> On 13/01/2023 21:10, Bhupesh Sharma wrote:
>>>>>> Fix the following '#address-cells' & '#size-cells' related
>>>>>> dt-binding error:
>>>>>>
>>>>>>     $ make dtbs_check
>>>>>>
>>>>>>     From schema: Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
>>>>>>          arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dtb: geniqup@4ac0000:
>>>>>>                #address-cells:0:0: 2 was expected
>>>>>>        From schema: Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
>>>>>
>>>>> Don't we want rather to unify the soc address range?
>>>>
>>>> Well, the assumption in the original dt-bindings was that every reg
>>>> variable is 4 * u32 wide (as most new qcom SoCs set #address- and
>>>> #size-cells to <2>). However, that is not the case for all of the
>>>> SoCs.
>>>
>>> Hm, which device of that SoC cannot be used with address/size cells 2?
>>
>> As noted in the git log already the geniqup on sm6115 / sm4250 cannot
>> be used with address/size cells 2 (See:
>> https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sm6115.dtsi#L795)
>>
> 
> I'm not able to find the reasoning you're referring to. We do have cells
> of 2 for these nodes on all other platforms.  If there is a specific
> problem, that can be documented and you can probably use ranges to
> reduce keep the cells of 1 in the geni wrappers.
> 
> 
> The reason why we have cells = 2 on most platforms is because the SMMU
> reports that it's capable of more address bits than the buses will
> handle. So without cells = 2, we can't describe dma-ranges appropriately
> and you get page faults due to truncated addresses on the bus when the
> iommu iova has been picking addresses for you.

Consolidating the replies to your, Krzysztof's and Rob's observations / 
suggestions here..

Yes, the original background to the problem was that I observed that for
the sm6115 based Qualcomm board with me, if I was using 36-bit DMA 
configuration with a few IP blocks (like SDHC), I was seeing some issues.

But, Konrad observed in [1] that it works fine for me on the sm6115 
based Lenovo tab, so I agree to his suggestions and may be he can help
send the '2-cell-ification' patch he has working, in which case I think
we can drop this patch.

@Konrad, please feel free to share the patch you were mentioning and I 
can help test it as well.

[1]. 
https://lore.kernel.org/linux-arm-msm/09fe3e93-328b-13a3-540b-4ca47224b176@linaro.org/

Thanks,
Bhupesh