From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49D21242D65; Wed, 29 Jul 2026 06:19:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785305984; cv=none; b=iu7tpBGRKqzgpQsuj5cC0AfuzVXktjgC286spiZwaAMoqh9rrieSRrYO3AwGrrG3qpFrXi/CA7JxDh59TBGsrUJUZZuPin3FIzNSqyMSwrosCKE7fgBuROHo8XpS67M8DDmNP8pHChGvWVdCgKZuhQ0p8NnQk/hDLtIkDgmHQQc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785305984; c=relaxed/simple; bh=whgiEArBV8aOm8noH6sp2Q0y+DeuBi6QC1lj8Ogv14U=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=sgoS3dn6Zh1mdPFT7r52bPmAIHclN98an59QZ7aA8UM8I8AEJ+Wql5yNZ991WZNT/Znj8tuZpu8a4IAA8lVYvcJsbBuwmE1+mGNFJh0CXtr8P5EDaGGouTSfa3hJrE8OXHvgiMiDNQ90gqCY4AfW9xdVPE1AZk2TFwMkWxPOPhM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GCrm57jO; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GCrm57jO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9528F1F000E9; Wed, 29 Jul 2026 06:19:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785305983; bh=1ahsh8KGGbbw/1MbGvQhKGLLx27DzaCVwhsg9q5kqLc=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=GCrm57jOMSzOzA3MwBPPQtUmDjo88LSUC5D8TTrgEfGhqjKgLuz1qquihSknF8Aia kp1dYTkiL/vNmi49xSM/5yRrU/MGi1TagDuFFEyzeyF5ZUDWdO1xzKiRzqQdGI8eiw iC04bX4I1+bWBkJiLxTMsen6RAK/iNN3zSuLE9iAEJP0ur/rKdas5qecHWFZkClxbW 5WVEdwePKcXbb3/RJ3H4Vkg7HffGkk8CXrp7csJIC5WzsjhFOYxrWorj0EOcDlCUcR 1DsbX5eZyirr3aEP+Fvm093ddJ378h5rwpYDMwrXN+r7tCseBYZE3eMl9kK1EW1pUZ 6k7gO4KG2zq7w== Message-ID: Date: Wed, 29 Jul 2026 08:19:36 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/2] arm64: dts: qcom: shikra-iqs-evk: Add LT9611UXD HDMI bridge support To: Mohit Dsor , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, venkata.valluru@oss.qualcomm.com, Jessica Zhang References: <20260728-shikra-work-v3-0-e08c322596ac@oss.qualcomm.com> <20260728-shikra-work-v3-1-e08c322596ac@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 28/07/2026 14:00, Mohit Dsor wrote: > Enable the Shikra MDSS display subsystem on the Qualcomm Shikra IQS > EVK board and add the Lontium LT9611UXD DSI-to-HDMI bridge node. > > The LT9611UXD is connected via I2C (bus 4, address 0x41), powered by > a GPIO-controlled 3.3V regulator (PM8150 GPIO4) and an always-on 1.8V > rail. Reset is on GPIO76 and interrupt on GPIO85. > > The bridge receives DSI output from MDSS and drives an HDMI-A > connector, with the link wired as: DPU -> DSI0 -> LT9611UXD -> HDMI. > > Signed-off-by: Mohit Dsor > --- Did you ignore here previous review as well, just like you did on LT9611C patchset? Best regards, Krzysztof