From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5C86C001DB for ; Wed, 9 Aug 2023 03:13:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229621AbjHIDNA (ORCPT ); Tue, 8 Aug 2023 23:13:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229548AbjHIDM7 (ORCPT ); Tue, 8 Aug 2023 23:12:59 -0400 Received: from codeconstruct.com.au (pi.codeconstruct.com.au [203.29.241.158]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C2151BEF; Tue, 8 Aug 2023 20:12:56 -0700 (PDT) Received: from pecola.lan (unknown [159.196.93.152]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 4317A20187; Wed, 9 Aug 2023 11:12:52 +0800 (AWST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1691550774; bh=i9oOIE6u25Hq6JcvLXnIndm0EgUPWueH7dpZORcm6s0=; h=Subject:From:To:Cc:Date:In-Reply-To:References; b=BfoxO+o34AYXS6056PPsw4uzxqv0EsEoUSObxAmlPjdJwdn4eKucLcrZBjra1e80o cx0MTHGXvzFP2uC9B4okjn8ErRFg0+MbcxbpezxFGglsH/OmChpVGB6kYGic8/U0oe jJk7zTl7pHzYUdgrfKQBJMLMT5hXOyY6V5coM71OPc+XqshcsDrgTpM8B/GZVCDg+n sYJJBN6ZXfNNXbJG0rcadMH3sty2NEVaxH+DakbqPJwQZRW8WsLUDogoF46p7cOcB7 YN/fxxaD5e/8x5bA5PBVmaZYKCPrsMNJ7R1h0zCU1o7JDGmvEA7hgKUowgXumnbUfe fk4Kz4fHI2KFg== Message-ID: Subject: Re: [PATCH 0/3] Add Aspeed AST2600 I3C support From: Jeremy Kerr To: Dylan Hung , "alexandre.belloni@bootlin.com" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "conor+dt@kernel.org" , "joel@jms.id.au" , "andrew@aj.id.au" , "p.zabel@pengutronix.de" , "linux-i3c@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" Cc: BMC-SW , "kobedylan@gmail.com" Date: Wed, 09 Aug 2023 11:12:51 +0800 In-Reply-To: References: <20230808154241.749641-1-dylan_hung@aspeedtech.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Dylan, > Thank you for your review. I3C1 and I3C2 can only operate in low > voltage (1.0V/1.2V), which is why there are no HVI3C1 and HVI3C2 > pinctrl definitions. Yep, and that was config that I hadn't tested (so hadn't proposed pinctrl definitions for those). > > For 2/3 and 3/3, you're adding a reset control for the global > > register block within the per-controller driver, but we can already > > do that on a global basis with the existing syscon device. Hence > > this earlier change: > =C2=A0 > I followed your recommendation and verified that it worked on my end. OK, excellent! > Should I resend the pinctrl patch as a stand-alone submission? Yes, and feel free to add: Reviewed-by: Jeremy Kerr Did your test use my i3c DTS definitions? If so, that's a decent datapoint that the config works (on something other than my setup), and so I'll submit upstream. Alternatively, feel free to include it with your pinctrl change, if you like. Cheers, Jeremy