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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429952db9d1sm30898105f8f.35.2025.10.30.03.43.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 30 Oct 2025 03:43:14 -0700 (PDT) Message-ID: Date: Thu, 30 Oct 2025 10:43:12 +0000 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions To: Vikram Sharma , mchehab@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, hverkuil-cisco@xs4all.nl, cros-qcom-dts-watchers@chromium.org, catalin.marinas@arm.com, will@kernel.org Cc: linux-arm-kernel@lists.infradead.org, quic_svankada@quicinc.com, quic_nihalkum@quicinc.com, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ravi Shankar , Vishal Verma References: <20251015131303.2797800-1-quic_vikramsa@quicinc.com> <20251015131303.2797800-3-quic_vikramsa@quicinc.com> From: Bryan O'Donoghue Content-Language: en-US In-Reply-To: <20251015131303.2797800-3-quic_vikramsa@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 15/10/2025 14:13, Vikram Sharma wrote: > From: Nihal Kumar Gupta > > Qualcomm QCS8300 SoC contains 3 Camera Control Interface (CCI). Compared > to lemans, the key difference is in SDA/SCL GPIO assignments and number > of CCIs. > > Co-developed-by: Ravi Shankar > Signed-off-by: Ravi Shankar > Co-developed-by: Vishal Verma > Signed-off-by: Vishal Verma > Co-developed-by: Suresh Vankadara > Signed-off-by: Suresh Vankadara > Signed-off-by: Nihal Kumar Gupta > Signed-off-by: Vikram Sharma > --- > arch/arm64/boot/dts/qcom/qcs8300.dtsi | 303 ++++++++++++++++++++++++++ > 1 file changed, 303 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi > index 75fafbcea845..8f2b5f40ce14 100644 > --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi > @@ -4769,6 +4769,117 @@ videocc: clock-controller@abf0000 { > #power-domain-cells = <1>; > }; > > + cci0: cci@ac13000 { > + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci"; > + reg = <0x0 0x0ac13000 0x0 0x1000>; > + > + interrupts = ; > + > + clocks = <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CCI_0_CLK>; > + clock-names = "cpas_ahb", > + "cci"; > + > + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; > + > + pinctrl-0 = <&cci0_i2c0_default &cci0_i2c1_default>; > + pinctrl-1 = <&cci0_i2c0_sleep &cci0_i2c1_sleep>; > + pinctrl-names = "default", "sleep"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + status = "disabled"; > + > + cci0_i2c0: i2c-bus@0 { > + reg = <0>; > + clock-frequency = <1000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + cci0_i2c1: i2c-bus@1 { > + reg = <1>; > + clock-frequency = <1000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > + cci1: cci@ac14000 { > + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci"; > + reg = <0x0 0x0ac14000 0x0 0x1000>; > + > + interrupts = ; > + > + clocks = <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CCI_1_CLK>; > + clock-names = "cpas_ahb", > + "cci"; > + > + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; > + > + pinctrl-0 = <&cci1_i2c0_default &cci1_i2c1_default>; > + pinctrl-1 = <&cci1_i2c0_sleep &cci1_i2c1_sleep>; > + pinctrl-names = "default", "sleep"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + status = "disabled"; > + > + cci1_i2c0: i2c-bus@0 { > + reg = <0>; > + clock-frequency = <1000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + cci1_i2c1: i2c-bus@1 { > + reg = <1>; > + clock-frequency = <1000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > + cci2: cci@ac15000 { > + compatible = "qcom,qcs8300-cci", "qcom,msm8996-cci"; > + reg = <0x0 0x0ac15000 0x0 0x1000>; > + > + interrupts = ; > + > + clocks = <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CCI_2_CLK>; > + clock-names = "cpas_ahb", > + "cci"; > + > + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; > + > + pinctrl-0 = <&cci2_i2c0_default &cci2_i2c1_default>; > + pinctrl-1 = <&cci2_i2c0_sleep &cci2_i2c1_sleep>; > + pinctrl-names = "default", "sleep"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + status = "disabled"; > + > + cci2_i2c0: i2c-bus@0 { > + reg = <0>; > + clock-frequency = <1000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + cci2_i2c1: i2c-bus@1 { > + reg = <1>; > + clock-frequency = <1000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > camss: isp@ac78000 { > compatible = "qcom,qcs8300-camss"; > > @@ -5063,6 +5174,198 @@ tlmm: pinctrl@f100000 { > #interrupt-cells = <2>; > wakeup-parent = <&pdc>; > > + cci0_i2c0_default: cci0-0-default-state { > + sda-pins { > + pins = "gpio57"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + > + scl-pins { > + pins = "gpio58"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + }; > + > + cci0_i2c0_sleep: cci0-0-sleep-state { > + sda-pins { > + pins = "gpio57"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + scl-pins { > + pins = "gpio58"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + > + cci0_i2c1_default: cci0-1-default-state { > + sda-pins { > + pins = "gpio29"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + > + scl-pins { > + pins = "gpio30"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + }; > + > + cci0_i2c1_sleep: cci0-1-sleep-state { > + sda-pins { > + pins = "gpio29"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + scl-pins { > + pins = "gpio30"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + > + cci1_i2c0_default: cci1-0-default-state { > + sda-pins { > + pins = "gpio59"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + > + scl-pins { > + pins = "gpio60"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + }; > + > + cci1_i2c0_sleep: cci1-0-sleep-state { > + sda-pins { > + pins = "gpio59"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + scl-pins { > + pins = "gpio60"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + > + cci1_i2c1_default: cci1-1-default-state { > + sda-pins { > + pins = "gpio31"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + > + scl-pins { > + pins = "gpio32"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + }; > + > + cci1_i2c1_sleep: cci1-1-sleep-state { > + sda-pins { > + pins = "gpio31"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + scl-pins { > + pins = "gpio32"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + > + cci2_i2c0_default: cci2-0-default-state { > + sda-pins { > + pins = "gpio61"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + > + scl-pins { > + pins = "gpio62"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + }; > + > + cci2_i2c0_sleep: cci2-0-sleep-state { > + sda-pins { > + pins = "gpio61"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + scl-pins { > + pins = "gpio62"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + > + cci2_i2c1_default: cci2-1-default-state { > + sda-pins { > + pins = "gpio54"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + > + scl-pins { > + pins = "gpio55"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-up = <2200>; > + }; > + }; > + > + cci2_i2c1_sleep: cci2-1-sleep-state { > + sda-pins { > + pins = "gpio54"; > + function = "cci_i2c_sda"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + > + scl-pins { > + pins = "gpio55"; > + function = "cci_i2c_scl"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + > hs0_mi2s_active: hs0-mi2s-active-state { > pins = "gpio106", "gpio107", "gpio108", "gpio109"; > function = "hs0_mi2s"; Reviewed-by: Bryan O'Donoghue