From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7ADF1E4BE; Tue, 27 May 2025 13:12:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748351579; cv=none; b=Rny4z/1bMinTPYcITp4vYoR5u5OowlDVftyAmIQRtO4SKHEHkC8mShaXijEndRiAzs0Vq/v8VXjmEyFoPAMKZZ826LtiHqebo1C6Z6vB4W0/x/zDhUJy48ljyzYdvZoU0mZyO7Bwg0KJotVWGA2GF4oAqbIS7+imdTcBAA/DMAU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748351579; c=relaxed/simple; bh=dzGbsJp//zG7Ib4jWbLdhkmBxjqHy4GxwjXSB0ekCFg=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Nemh4/SvrrGVKlcCVE3s/KuU+URDXBcgznagRX07TiF/DVBWw16U3NOfXA2jzLR4nPcn1puA7CjtmcvyldMrDHy2Lb3+zfin4HUB63rYO+KhyYKrDMJEVvuF7rSSDwgNpmx3uIKk/tz9Em/XWOz+iTy8+5AjjPltLjswH2xjDms= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qOzwl26J; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qOzwl26J" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8A14DC4CEE9; Tue, 27 May 2025 13:12:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748351579; bh=dzGbsJp//zG7Ib4jWbLdhkmBxjqHy4GxwjXSB0ekCFg=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=qOzwl26JN6O+y041qoX9r0mMR044QBRYuwDcw0qzQmN1G3G38vHvbkM1xjuuIZQke ExKpA99O4IBzVhvQF0VMFkqNgxtTOJNzHYyi95jv81cTKAHBqpdikYp7OqyzpZ5IMQ 2nKBrcz11JWiGg+Hfkf212qytSXEZwK6jfKoKitW0DQ/rQMdyHpdygpKCiZdxST6ss Wr77GYqoxufgtwQEhXUCopGDbk6CwVf5o+EHDKMbYvgLsJLFUbcRhk+MmdPMYksEuT Xa7YPqgr2d7qUwFlD7YFI2d/Z6ykzyqQNkH3L7PmzOi49BAbpYlOV5ZjW38scOi0t9 9aZYbxzzuWO0Q== Message-ID: Date: Tue, 27 May 2025 15:12:54 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] ARM: dts: stm32: fullfill diversity with OPP for STM32M15x SOCs To: Amelie Delaunay , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Liam Girdwood , Mark Brown Cc: devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20250527-stm32mp157f-dk2-v1-0-8aef885a4928@foss.st.com> <20250527-stm32mp157f-dk2-v1-1-8aef885a4928@foss.st.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 27/05/2025 15:03, Amelie Delaunay wrote: > From: Alexandre Torgue > > This commit creates new files to manage security features and supported OPP > on STM32MP15x SOCs. On STM32MP15xY, "Y" gives information: > -Y = A means no cryp IP and no secure boot + A7-CPU@650MHz. > -Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz. > -Y = D means no cryp IP and no secure boot + A7-CPU@800MHz. > -Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz. > > It fullfills the initial STM32MP15x SoC diversity introduced by > commit 0eda69b6c5f9 ("ARM: dts: stm32: Manage security diversity > for STM32M15x SOCs"). > > Signed-off-by: Alexandre Torgue > Signed-off-by: Amelie Delaunay > --- > arch/arm/boot/dts/st/stm32mp15xa.dtsi | 5 +++++ > arch/arm/boot/dts/st/stm32mp15xc.dtsi | 4 +++- > arch/arm/boot/dts/st/stm32mp15xd.dtsi | 5 +++++ > arch/arm/boot/dts/st/stm32mp15xf.dtsi | 20 ++++++++++++++++++++ > 4 files changed, 33 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/st/stm32mp15xa.dtsi b/arch/arm/boot/dts/st/stm32mp15xa.dtsi > new file mode 100644 > index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98 > --- /dev/null > +++ b/arch/arm/boot/dts/st/stm32mp15xa.dtsi > @@ -0,0 +1,5 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) > +/* > + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved > + * Author: Alexandre Torgue for STMicroelectronics. You create entirely empty, unused file. There is literally no benefit of this file, no impact, just more files to handle. > + */ > diff --git a/arch/arm/boot/dts/st/stm32mp15xc.dtsi b/arch/arm/boot/dts/st/stm32mp15xc.dtsi > index 97465717f932fc223647af76e88a6182cf3c870f..4d30a2a537f15c1e145635b090de0f0222526579 100644 > --- a/arch/arm/boot/dts/st/stm32mp15xc.dtsi > +++ b/arch/arm/boot/dts/st/stm32mp15xc.dtsi > @@ -1,9 +1,11 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) License change is not explained in commit msg and anyway should be separate commit with acks/sobs from all copyright holders. You also need to CC them (Cc e.g. Gatien). > /* > * Copyright (C) STMicroelectronics 2019 - All Rights Reserved > * Author: Alexandre Torgue for STMicroelectronics. > */ > > +#include "stm32mp15xa.dtsi" > + > &etzpc { > cryp1: cryp@54001000 { > compatible = "st,stm32mp1-cryp"; > diff --git a/arch/arm/boot/dts/st/stm32mp15xd.dtsi b/arch/arm/boot/dts/st/stm32mp15xd.dtsi > new file mode 100644 > index 0000000000000000000000000000000000000000..cb55f5966f74011d12d7a5c6ad047569d25d4e98 > --- /dev/null > +++ b/arch/arm/boot/dts/st/stm32mp15xd.dtsi > @@ -0,0 +1,5 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) > +/* > + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved > + * Author: Alexandre Torgue for STMicroelectronics. > + */ Same problems. > diff --git a/arch/arm/boot/dts/st/stm32mp15xf.dtsi b/arch/arm/boot/dts/st/stm32mp15xf.dtsi > new file mode 100644 > index 0000000000000000000000000000000000000000..5f6a2952125d00d468e2e4012024f02380cfaa49 > --- /dev/null > +++ b/arch/arm/boot/dts/st/stm32mp15xf.dtsi > @@ -0,0 +1,20 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) > +/* > + * Copyright (C) STMicroelectronics 2025 - All Rights Reserved > + * Author: Alexandre Torgue for STMicroelectronics. > + */ > + > +#include "stm32mp15xd.dtsi" > + > +/ { > + soc { > + cryp1: cryp@54001000 { > + compatible = "st,stm32mp1-cryp"; > + reg = <0x54001000 0x400>; > + interrupts = ; > + clocks = <&rcc CRYP1>; > + resets = <&rcc CRYP1_R>; > + status = "disabled"; > + }; > + }; > +}; > Best regards, Krzysztof