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Wed, 15 Oct 2025 03:35:47 -0700 (PDT) Message-ID: Subject: Re: [PATCH 6/6] iio: adc: ad7380: Add support for multiple SPI buses From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marcelo Schmitt , Michael Hennerich , Nuno =?ISO-8859-1?Q?S=E1?= , Jonathan Cameron , Andy Shevchenko Cc: Sean Anderson , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Date: Wed, 15 Oct 2025 11:36:20 +0100 In-Reply-To: <20251014-spi-add-multi-bus-support-v1-6-2098c12d6f5f@baylibre.com> References: <20251014-spi-add-multi-bus-support-v1-0-2098c12d6f5f@baylibre.com> <20251014-spi-add-multi-bus-support-v1-6-2098c12d6f5f@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Tue, 2025-10-14 at 17:02 -0500, David Lechner wrote: > Add support for multiple SPI buses to increase throughput. The AD7380 > family of ADCs have multiple SDO lines on the chip that can be used to > read each channel on a separate SPI bus. If wired up to a SPI controller > that supports it, the driver will now take advantage of this feature. > This allows reaching the maximum sample rate advertised in the datasheet > when combined with SPI offloading. >=20 > Signed-off-by: David Lechner > --- One minor thing. With it, Reviewed-by: Nuno S=C3=A1 > =C2=A0drivers/iio/adc/ad7380.c | 41 ++++++++++++++++++++++++++++---------= ---- > =C2=A01 file changed, 28 insertions(+), 13 deletions(-) >=20 > diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c > index > bfd908deefc0f40b42bd8a44bfce7a2510b2fdf1..36abe95852006a81f7e31f8034699e5= 9292a > f79e 100644 > --- a/drivers/iio/adc/ad7380.c > +++ b/drivers/iio/adc/ad7380.c > @@ -77,8 +77,7 @@ > =C2=A0#define AD7380_CONFIG1_REFSEL BIT(1) > =C2=A0#define AD7380_CONFIG1_PMODE BIT(0) > =C2=A0 > -#define AD7380_CONFIG2_SDO2 GENMASK(9, 8) > -#define AD7380_CONFIG2_SDO BIT(8) > +#define AD7380_CONFIG2_SDO GENMASK(9, 8) > =C2=A0#define AD7380_CONFIG2_RESET GENMASK(7, 0) > =C2=A0 > =C2=A0#define AD7380_CONFIG2_RESET_SOFT 0x3C > @@ -92,11 +91,6 @@ > =C2=A0#define T_CONVERT_X_NS 500 /* xth conversion start time > (oversampling) */ > =C2=A0#define T_POWERUP_US 5000 /* Power up */ > =C2=A0 > -/* > - * AD738x support several SDO lines to increase throughput, but driver > currently > - * supports only 1 SDO line (standard SPI transaction) > - */ > -#define AD7380_NUM_SDO_LINES 1 > =C2=A0#define AD7380_DEFAULT_GAIN_MILLI 1000 > =C2=A0 > =C2=A0/* > @@ -1084,7 +1078,7 @@ static int ad7380_set_ch(struct ad7380_state *st, > unsigned int ch) > =C2=A0 if (oversampling_ratio > 1) > =C2=A0 xfer.delay.value =3D T_CONVERT_0_NS + > =C2=A0 T_CONVERT_X_NS * (oversampling_ratio - 1) * > - st->chip_info->num_simult_channels / > AD7380_NUM_SDO_LINES; > + st->chip_info->num_simult_channels / st->spi- > >num_data_bus; > =C2=A0 > =C2=A0 return spi_sync_transfer(st->spi, &xfer, 1); > =C2=A0} > @@ -1113,7 +1107,7 @@ static int ad7380_update_xfers(struct ad7380_state = *st, > =C2=A0 if (oversampling_ratio > 1) > =C2=A0 t_convert =3D T_CONVERT_0_NS + T_CONVERT_X_NS * > =C2=A0 (oversampling_ratio - 1) * > - st->chip_info->num_simult_channels / > AD7380_NUM_SDO_LINES; > + st->chip_info->num_simult_channels / st->spi- > >num_data_bus; > =C2=A0 > =C2=A0 if (st->seq) { > =C2=A0 xfer[0].delay.value =3D xfer[1].delay.value =3D t_convert; > @@ -1124,6 +1118,7 @@ static int ad7380_update_xfers(struct ad7380_state = *st, > =C2=A0 AD7380_SPI_BYTES(scan_type) * > =C2=A0 st->chip_info->num_simult_channels; > =C2=A0 xfer[3].rx_buf =3D xfer[2].rx_buf + xfer[2].len; > + xfer[3].multi_bus_mode =3D xfer[2].multi_bus_mode; Why not doing the above once during probe? - Nuno S=C3=A1