* [PATCH v3 0/2] Add Renesas RPC-IF support
@ 2020-05-18 20:31 Sergei Shtylyov
0 siblings, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2020-05-18 20:31 UTC (permalink / raw)
To: Rob Herring, devicetree
Cc: Philipp Zabel, Mason Yang, linux-spi, Chris Brandt,
linux-mtd@lists.infradead.org
Hello!
Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
to be accessed via the external address space read mode or the manual mode.
The memory controller driver for RPC-IF registers either SPI or HyperFLash
subdevice, depending on the contents of the device tree subnode; it also
provides the abstract "back end" API that can be used by the "front end"
SPI/MTD drivers to talk to the real hardware...
Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
[1/2] dt-bindings: memory: document Renesas RPC-IF bindings
[2/2] memory: add Renesas RPC-IF driver
MBR, Sergei
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v3 0/2] Add Renesas RPC-IF support
@ 2020-06-13 18:37 Sergei Shtylyov
2020-06-13 18:38 ` Sergei Shtylyov
2020-06-13 18:40 ` [PATCH v4 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
0 siblings, 2 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2020-06-13 18:37 UTC (permalink / raw)
To: Rob Herring, devicetree
Cc: Philipp Zabel, Mason Yang, linux-spi, Chris Brandt, linux-mtd,
linux-renesas-soc
Hello!
Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
to be accessed via the external address space read mode or the manual mode.
The memory controller driver for RPC-IF registers either SPI or HyperFLash
subdevice, depending on the contents of the device tree subnode; it also
provides the abstract "back end" API that can be used by the "front end"
SPI/MTD drivers to talk to the real hardware...
Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
[1/2] dt-bindings: memory: document Renesas RPC-IF bindings
[2/2] memory: add Renesas RPC-IF driver
MBR, Sergei
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v3 0/2] Add Renesas RPC-IF support
2020-06-13 18:37 [PATCH v3 0/2] Add Renesas RPC-IF support Sergei Shtylyov
@ 2020-06-13 18:38 ` Sergei Shtylyov
2020-06-13 18:40 ` [PATCH v4 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
1 sibling, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2020-06-13 18:38 UTC (permalink / raw)
To: Rob Herring, devicetree
Cc: Philipp Zabel, Mason Yang, linux-spi, Chris Brandt, linux-mtd,
linux-renesas-soc
Should read v4, not v3 in the subject. Sigh...
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v4 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-06-13 18:37 [PATCH v3 0/2] Add Renesas RPC-IF support Sergei Shtylyov
2020-06-13 18:38 ` Sergei Shtylyov
@ 2020-06-13 18:40 ` Sergei Shtylyov
1 sibling, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2020-06-13 18:40 UTC (permalink / raw)
To: Rob Herring, devicetree
Cc: Mason Yang, linux-spi, Chris Brandt, linux-mtd, linux-renesas-soc
Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
HyperFlash connected to the SoC to be accessed via the external address
space read mode or the manual mode.
Document the device tree bindings for the Renesas RPC-IF found in the R-Car
gen3 SoCs.
Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 4:
- added the SoC name comments to the RPC-IF's "compatible" prop description;
- removed a hyphen before 'enum' in the subnode description;
- removed leading 0s in the "reg" prop in the example.
Changes in version 3:
- fixed up the whitespace and added hyphens in the "compatible" prop text, also
removed the comments;
- specified the subnode name as "flash", and used "enum" in the subnode text;
- fixed up the SPDX-License-Identifier: tag.
Changes in version 2:
- rewrote the bindings in YAML.
Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 87 ++++++++++
1 file changed, 87 insertions(+)
Index: linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
===================================================================
--- /dev/null
+++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas Reduced Pin Count Interface (RPC-IF)
+
+maintainers:
+ - Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+
+description: |
+ Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
+ be accessed via the external address space read mode or the manual mode.
+
+ The flash chip itself should be represented by a subnode of the RPC-IF node.
+ The flash interface is selected based on the "compatible" property of this
+ subnode:
+ - if it contains "jedec,spi-nor", then SPI is used;
+ - if it contains "cfi-flash", then HyperFlash is used.
+
+allOf:
+ - $ref: "/schemas/spi/spi-controller.yaml#"
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,r8a77980-rpc-if # R-Car V3H
+ - renesas,r8a77995-rpc-if # R-Car D3
+ - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device
+
+ reg:
+ items:
+ - description: RPC-IF registers
+ - description: direct mapping read mode area
+ - description: write buffer area
+
+ reg-names:
+ items:
+ - const: regs
+ - const: dirmap
+ - const: wbuf
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+patternProperties:
+ "flash@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - cfi-flash
+ - jedec,spi-nor
+
+examples:
+ - |
+ #include <dt-bindings/clock/renesas-cpg-mssr.h>
+ #include <dt-bindings/power/r8a77995-sysc.h>
+
+ spi@ee200000 {
+ compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
+ reg = <0xee200000 0x200>,
+ <0x08000000 0x4000000>,
+ <0xee208000 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
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