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[83.9.30.37]) by smtp.gmail.com with ESMTPSA id t1-20020a1709061be100b0086f40238403sm6522221ejg.223.2023.01.19.06.01.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Jan 2023 06:01:58 -0800 (PST) Message-ID: Date: Thu, 19 Jan 2023 15:01:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH 4/6] drm/msm/hdmi: make hdmi_phy_8960 OF clk provider Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20230119132219.2479775-1-dmitry.baryshkov@linaro.org> <20230119132219.2479775-5-dmitry.baryshkov@linaro.org> From: Konrad Dybcio In-Reply-To: <20230119132219.2479775-5-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 19.01.2023 14:22, Dmitry Baryshkov wrote: > On MSM8960 the HDMI PHY provides the PLL clock to the MMCC. As we are > preparing to convert the MSM8960 to use DT clocks properties (rather > than global clock names), register the OF clock provider. > > Signed-off-by: Dmitry Baryshkov > --- Reviewed-by: Konrad Dybcio Konrad > drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c | 15 ++++++++++----- > 1 file changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c b/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c > index c3e7ff45e52a..cb35a297afbd 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c > @@ -422,8 +422,7 @@ int msm_hdmi_pll_8960_init(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct hdmi_pll_8960 *pll; > - struct clk *clk; > - int i; > + int i, ret; > > /* sanity check: */ > for (i = 0; i < (ARRAY_SIZE(freqtbl) - 1); i++) > @@ -443,10 +442,16 @@ int msm_hdmi_pll_8960_init(struct platform_device *pdev) > pll->pdev = pdev; > pll->clk_hw.init = &pll_init; > > - clk = devm_clk_register(dev, &pll->clk_hw); > - if (IS_ERR(clk)) { > + ret = devm_clk_hw_register(dev, &pll->clk_hw); > + if (ret < 0) { > DRM_DEV_ERROR(dev, "failed to register pll clock\n"); > - return -EINVAL; > + return ret; > + } > + > + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &pll->clk_hw); > + if (ret) { > + DRM_DEV_ERROR(dev, "%s: failed to register clk provider: %d\n", __func__, ret); > + return ret; > } > > return 0;