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Tue, 26 Dec 2023 04:22:59 -0800 (PST) Received: from [192.168.0.22] ([78.10.206.178]) by smtp.gmail.com with ESMTPSA id z27-20020a17090674db00b00a26aa045d48sm5225353ejl.117.2023.12.26.04.22.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Dec 2023 04:22:58 -0800 (PST) Message-ID: Date: Tue, 26 Dec 2023 13:22:57 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 1/2] dt-bindings: usb: dwc3: Clean up hs_phy_irq in binding Content-Language: en-US To: Krishna Kurapati PSSNV , Krzysztof Kozlowski , Rob Herring , Bjorn Andersson , Konrad Dybcio , Wesley Cheng , Johan Hovold Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Greg Kroah-Hartman , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Thinh Nguyen , quic_ppratap@quicinc.com, quic_jackp@quicinc.com, Andy Gross References: <20231222063648.11193-1-quic_kriskura@quicinc.com> <20231222063648.11193-2-quic_kriskura@quicinc.com> <268f9f54-8b2a-42bb-9a5d-10bd930cb282@quicinc.com> <55c478c7-abcc-4487-b81c-479df47d5666@linaro.org> <67c7c84c-c631-468e-ae67-1c31d41a605b@quicinc.com> From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 26/12/2023 11:03, Krishna Kurapati PSSNV wrote: >>>>> - if: >>>>> @@ -460,11 +422,13 @@ allOf: >>>>> compatible: >>>>> contains: >>>>> enum: >>>>> + - qcom,ipq5332-dwc3 >>>>> - qcom,sc8280xp-dwc3 >>>>> - qcom,x1e80100-dwc3 >>>>> then: >>>>> properties: >>>>> interrupts: >>>>> + minItems: 3 >>>> >>>> Hm, why? This commit is unmanageable. Your commit msg is already huge >>>> but still does not explain this. Are you sure you are fixing only one >>>> logical thing per patch? Does not look like. >>>> >>> >>> This is reordering the targets based on interrupts they have. I put it >>> in one commit because splitting this into multiple patches breaks one >>> thing or other. Also once I am defining permutations, I have to group >>> targets into these combinations in the same patch. I know this is a big >>> commit but it solves the interrupt cleanup and defines a way for future >>> targets. >> >> >> This does not answer why, you sc8280xp and x1e80100 not get one optional >> interrupt. I asked "why" you are doing this change. Why do you need it? >> What is the rationale? >> >> Then I grunted about unmanageable commit, because all my troubles to >> review it are the effect of it: it is very difficult to read. It is also >> difficult for you, because you keep making here mistakes. So if you >> cannot write this commit properly and I cannot review it, then it is way >> over-complicated, don't you think? But this is still second problem >> here, don't ignore the fist - "why?" > > HI Krzysztof, > > Thanks for the review. > To answer the question, > > "why ?" : The interrupts have been mis-interpreted on many platforms or > many interrupts are missing. I asked about these two specific platforms. Please explain these changes. Above is so generic that tells me nothing. > > Now, if I am adding the missing interrupts, I need to segregate targets > also into respective buckets in the same patch and that is what making > this patch a little complicated. Is it possible / acceptable to split > this into two patches if this is the case. Can you help with suggestions > from your end ? Or may be I am understanding your question wrong ? 😅 Split the patch into manageable chunks. Best regards, Krzysztof