* [PATCH V7 03/10] phy: SPEAr1310/40-miphy: Add binding information
[not found] ` <cover.1393568715.git.mohit.kumar-qxv4g6HH51o@public.gmane.org>
@ 2014-02-28 11:54 ` Mohit Kumar
2014-02-28 11:54 ` [PATCH V7 04/10] SPEAr: misc: " Mohit Kumar
2014-02-28 11:54 ` [PATCH V7 06/10] SPEAr13XX: Add binding information for PCIe controller Mohit Kumar
2 siblings, 0 replies; 3+ messages in thread
From: Mohit Kumar @ 2014-02-28 11:54 UTC (permalink / raw)
To: arnd-r2nGTMty4D4
Cc: Pratyush Anand, Mohit Kumar, Viresh Kumar, Kishon Vijay Abraham I,
spear-devel-nkJGhpqTU55BDgjK7y7TUQ,
devicetree-u79uwXL29TY76Z2rM5mHXA
From: Pratyush Anand <pratyush.anand-qxv4g6HH51o@public.gmane.org>
SPEAr1310/40 uses miphy for PCIe, SATA. This patch adds documentation
for the binding on the top of generic phy bindings.
Signed-off-by: Pratyush Anand <pratyush.anand-qxv4g6HH51o@public.gmane.org>
Cc: Mohit Kumar <mohit.kumar-qxv4g6HH51o@public.gmane.org>
Cc: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: Viresh Kumar <viresh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
Cc: spear-devel-nkJGhpqTU55BDgjK7y7TUQ@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
---
.../devicetree/bindings/phy/st-spear1310-miphy.txt | 12 ++++++++++++
.../devicetree/bindings/phy/st-spear1340-miphy.txt | 11 +++++++++++
2 files changed, 23 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
create mode 100644 Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt
diff --git a/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
new file mode 100644
index 0000000..b9b281a
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
@@ -0,0 +1,12 @@
+ST SPEAr1310-miphy DT detail
+===================================
+
+SPEAr1310-miphy is a phy controller supporting PCIe and SATA.
+
+Required properties:
+- compatible : should be "st,spear1310-miphy"
+- reg : offset and length of the PHY register set.
+- misc: phandle for the syscon node to access misc registers
+- phy-id: Instance id of the phy.
+- #phy-cells : from the generic PHY bindings, must be 1.
+ - cell[1]: 0 if phy used for SATA, 1 for PCIe.
diff --git a/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt
new file mode 100644
index 0000000..7eb5335
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt
@@ -0,0 +1,11 @@
+ST SPEAr1340-miphy DT detail
+===================================
+
+SPEAr1340-miphy is a phy controller supporting PCIe and SATA.
+
+Required properties:
+- compatible : should be "st,spear1340-miphy"
+- reg : offset and length of the PHY register set.
+- misc: phandle for the syscon node to access misc registers
+- #phy-cells : from the generic PHY bindings, must be 1.
+ - cell[1]: 0 if phy used for SATA, 1 for PCIe.
--
1.7.0.1
--
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* [PATCH V7 04/10] SPEAr: misc: Add binding information
[not found] ` <cover.1393568715.git.mohit.kumar-qxv4g6HH51o@public.gmane.org>
2014-02-28 11:54 ` [PATCH V7 03/10] phy: SPEAr1310/40-miphy: Add binding information Mohit Kumar
@ 2014-02-28 11:54 ` Mohit Kumar
2014-02-28 11:54 ` [PATCH V7 06/10] SPEAr13XX: Add binding information for PCIe controller Mohit Kumar
2 siblings, 0 replies; 3+ messages in thread
From: Mohit Kumar @ 2014-02-28 11:54 UTC (permalink / raw)
To: arnd-r2nGTMty4D4
Cc: Pratyush Anand, Mohit Kumar, Viresh Kumar,
spear-devel-nkJGhpqTU55BDgjK7y7TUQ,
devicetree-u79uwXL29TY76Z2rM5mHXA
From: Pratyush Anand <pratyush.anand-qxv4g6HH51o@public.gmane.org>
SPEAr SOCs have some miscellaneous registers which are used to configure
few properties of different peripheral controllers.
Signed-off-by: Pratyush Anand <pratyush.anand-qxv4g6HH51o@public.gmane.org>
Cc: Mohit Kumar <mohit.kumar-qxv4g6HH51o@public.gmane.org>
Cc: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: Viresh Kumar <viresh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: spear-devel-nkJGhpqTU55BDgjK7y7TUQ@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
---
.../devicetree/bindings/arm/spear-misc.txt | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/spear-misc.txt
diff --git a/Documentation/devicetree/bindings/arm/spear-misc.txt b/Documentation/devicetree/bindings/arm/spear-misc.txt
new file mode 100644
index 0000000..cf64982
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spear-misc.txt
@@ -0,0 +1,9 @@
+SPEAr Misc configuration
+===========================
+SPEAr SOCs have some miscellaneous registers which are used to configure
+few properties of different peripheral controllers.
+
+misc node required properties:
+
+- compatible Should be "st,spear1340-misc", "syscon".
+- reg: Address range of misc space upto 8K
--
1.7.0.1
--
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* [PATCH V7 06/10] SPEAr13XX: Add binding information for PCIe controller
[not found] ` <cover.1393568715.git.mohit.kumar-qxv4g6HH51o@public.gmane.org>
2014-02-28 11:54 ` [PATCH V7 03/10] phy: SPEAr1310/40-miphy: Add binding information Mohit Kumar
2014-02-28 11:54 ` [PATCH V7 04/10] SPEAr: misc: " Mohit Kumar
@ 2014-02-28 11:54 ` Mohit Kumar
2 siblings, 0 replies; 3+ messages in thread
From: Mohit Kumar @ 2014-02-28 11:54 UTC (permalink / raw)
To: arnd-r2nGTMty4D4
Cc: Pratyush Anand, Mohit Kumar, Viresh Kumar,
spear-devel-nkJGhpqTU55BDgjK7y7TUQ,
devicetree-u79uwXL29TY76Z2rM5mHXA
From: Pratyush Anand <pratyush.anand-qxv4g6HH51o@public.gmane.org>
SPEAr13XX uses designware PCIe controller. This patch adds information
for the PCIe binding properties which are specific to SPEAr13XX SoC
series.
Signed-off-by: Pratyush Anand <pratyush.anand-qxv4g6HH51o@public.gmane.org>
Cc: Mohit Kumar <mohit.kumar-qxv4g6HH51o@public.gmane.org>
Cc: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: Viresh Kumar <viresh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: spear-devel-nkJGhpqTU55BDgjK7y7TUQ@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
---
.../devicetree/bindings/pci/spear13xx-pcie.txt | 14 ++++++++++++++
1 files changed, 14 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/spear13xx-pcie.txt
diff --git a/Documentation/devicetree/bindings/pci/spear13xx-pcie.txt b/Documentation/devicetree/bindings/pci/spear13xx-pcie.txt
new file mode 100644
index 0000000..49ea76d
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/spear13xx-pcie.txt
@@ -0,0 +1,14 @@
+SPEAr13XX PCIe DT detail:
+================================
+
+SPEAr13XX uses synopsis designware PCIe controller and ST MiPHY as phy
+controller.
+
+Required properties:
+- compatible : should be "st,spear1340-pcie", "snps,dw-pcie".
+- phys : phandle to phy node associated with pcie controller
+- phy-names : must be "pcie-phy"
+- All other definitions as per generic PCI bindings
+
+ Optional properties:
+- st,pcie-is-gen1 indicates that forced gen1 initialization is needed.
--
1.7.0.1
--
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[not found] ` <cover.1393568715.git.mohit.kumar-qxv4g6HH51o@public.gmane.org>
2014-02-28 11:54 ` [PATCH V7 03/10] phy: SPEAr1310/40-miphy: Add binding information Mohit Kumar
2014-02-28 11:54 ` [PATCH V7 04/10] SPEAr: misc: " Mohit Kumar
2014-02-28 11:54 ` [PATCH V7 06/10] SPEAr13XX: Add binding information for PCIe controller Mohit Kumar
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