From: Richard GENOUD <richard.genoud@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: "Richard Weinberger" <richard@nod.at>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
"Wentao Liang" <vulab@iscas.ac.cn>,
"Johan Hovold" <johan@kernel.org>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 04/15] mtd: rawnand: sunxi: introduce reg_user_data in sunxi_nfc_caps
Date: Fri, 24 Oct 2025 09:20:58 +0200 [thread overview]
Message-ID: <f076f6a6-372a-41ff-a78a-48d1af4ec33d@bootlin.com> (raw)
In-Reply-To: <87y0p3tiz9.fsf@bootlin.com>
Hi,
Le 22/10/2025 à 10:54, Miquel Raynal a écrit :
> Hi Richard,
>
> On 20/10/2025 at 12:13:00 +02, Richard Genoud <richard.genoud@bootlin.com> wrote:
>
>> The H6/H616 USER_DATA register is not at the same offset as the
>> A10/A23 one, so move its offset into sunxi_nfc_caps
>>
>> No functional change.
>>
>> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
>> ---
>> drivers/mtd/nand/raw/sunxi_nand.c | 13 +++++++++----
>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
>> index 0285e4d0ca7f..8f5d8df19e33 100644
>> --- a/drivers/mtd/nand/raw/sunxi_nand.c
>> +++ b/drivers/mtd/nand/raw/sunxi_nand.c
>> @@ -48,7 +48,8 @@
>> #define NFC_REG_DEBUG 0x003C
>> #define NFC_REG_A10_ECC_ERR_CNT 0x0040
>> #define NFC_REG_ECC_ERR_CNT(nfc, x) ((nfc->caps->reg_ecc_err_cnt + (x)) & ~0x3)
>> -#define NFC_REG_USER_DATA(x) (0x0050 + ((x) * 4))
>> +#define NFC_REG_A10_USER_DATA 0x0050
>> +#define NFC_REG_USER_DATA(nfc, x) (nfc->caps->reg_user_data + ((x) * 4))
>> #define NFC_REG_SPARE_AREA 0x00A0
>> #define NFC_REG_PAT_ID 0x00A4
>> #define NFC_REG_MDMA_ADDR 0x00C0
>> @@ -214,6 +215,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
>> * through MBUS on A23/A33 needs extra configuration.
>> * @reg_io_data: I/O data register
>> * @reg_ecc_err_cnt: ECC error counter register
>> + * @reg_user_data: User data register
>> * @dma_maxburst: DMA maxburst
>> * @ecc_strengths: Available ECC strengths array
>> * @nstrengths: Size of @ecc_strengths
>> @@ -222,6 +224,7 @@ struct sunxi_nfc_caps {
>> bool has_mdma;
>> unsigned int reg_io_data;
>> unsigned int reg_ecc_err_cnt;
>> + unsigned int reg_user_data;
>> unsigned int dma_maxburst;
>> const u8 *ecc_strengths;
>> unsigned int nstrengths;
>> @@ -723,8 +726,8 @@ static void sunxi_nfc_hw_ecc_get_prot_oob_bytes(struct nand_chip *nand, u8 *oob,
>> {
>> struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
>>
>> - sunxi_nfc_user_data_to_buf(readl(nfc->regs + NFC_REG_USER_DATA(step)),
>> - oob);
>> + sunxi_nfc_user_data_to_buf(readl(nfc->regs +
>> + NFC_REG_USER_DATA(nfc, step)),
>> oob);
>
> Minor nit, column limit is 100 now, so typically for this kind of
> situation everything would fit on a single line.
Indeed, the 80 column limit has been loosened (but braille displays are
still 80 cells max AFAIK).
Anyway, you're right, the 80-rule could be bent here for readability.
>
> Don't respin just for that if there is nothing else later, but if a v4
> is needed you can change it.
>
> Looks neat otherwise so far.
>
> Thanks,
> Miquèl
Thanks!
--
Richard Genoud, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2025-10-24 7:21 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 10:12 [PATCH v3 00/15] Introduce Allwinner H6/H616 NAND controller support Richard Genoud
2025-10-20 10:12 ` [PATCH v3 01/15] mtd: rawnand: sunxi: Remove superfluous register readings Richard Genoud
2025-10-20 10:12 ` [PATCH v3 02/15] mtd: rawnand: sunxi: move ECC strenghts in sunxi_nfc_caps Richard Genoud
2025-10-20 10:12 ` [PATCH v3 03/15] mtd: rawnand: sunxi: introduce reg_ecc_err_cnt " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 04/15] mtd: rawnand: sunxi: introduce reg_user_data " Richard Genoud
2025-10-22 8:54 ` Miquel Raynal
2025-10-22 9:07 ` Johan Hovold
2025-10-24 7:20 ` Richard GENOUD [this message]
2025-10-20 10:13 ` [PATCH v3 05/15] mtd: rawnand: sunxi: rework pattern found registers Richard Genoud
2025-10-22 9:02 ` Miquel Raynal
2025-10-22 10:05 ` Geert Uytterhoeven
2025-10-20 10:13 ` [PATCH v3 06/15] mtd: rawnand: sunxi: add has_ecc_block_512 capability Richard Genoud
2025-10-20 10:13 ` [PATCH v3 07/15] mtd: rawnand: sunxi: introduce ecc_mode_mask in sunxi_nfc_caps Richard Genoud
2025-10-22 9:05 ` Miquel Raynal
2025-10-24 7:52 ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 08/15] mtd: rawnand: sunxi: introduce random en/dir " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 09/15] mtd: rawnand: sunxi: introduce reg_pat_id " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 10/15] mtd: rawnand: sunxi: introduce reg_spare_area " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 11/15] mtd: rawnand: sunxi: introduce ecc_err_mask " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 12/15] mtd: rawnand: sunxi: introduce sram_size " Richard Genoud
2025-10-20 10:13 ` [PATCH v3 13/15] mtd: rawnand: sunxi: Add support for H616 nand controller Richard Genoud
2025-10-22 9:18 ` Miquel Raynal
2025-10-28 7:30 ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 14/15] dt-bindings: mtd: sunxi: Add H616 compatible Richard Genoud
2025-10-20 17:18 ` Conor Dooley
2025-10-22 9:20 ` Miquel Raynal
2025-10-24 9:08 ` Richard GENOUD
2025-10-20 10:13 ` [PATCH v3 15/15] arm64: dts: allwinner: h616: add NAND controller Richard Genoud
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