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Thu, 12 Nov 2026 11:29:29 -0800 (PST) Received: from [198.18.0.1] ([45.95.212.224]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b197d0f6e0sm5972639a91.9.2026.11.12.11.29.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Nov 2026 11:29:28 -0800 (PST) Message-ID: Date: Fri, 13 Nov 2026 03:29:23 +0800 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] ARM: dts: zynq: Add ALINX AX7Z020B development board To: Krzysztof Kozlowski Cc: Conor Dooley , Krzysztof Kozlowski , Michal Simek , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn References: <20261111162917.97532-1-cyan2254650260@gmail.com> <20261111162917.97532-3-cyan2254650260@gmail.com> <20261112-mottled-formidable-galago-eb933b@quoll> Content-Language: en-US From: Pufan Jin In-Reply-To: <20261112-mottled-formidable-galago-eb933b@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/12/26 7:08 PM, Krzysztof Kozlowski wrote: > On Wed, Nov 11, 2026 at 11:29:17AM -0500, Pufan Jin wrote: >> Add devicetree support for the ALINX AX7Z020B development board. >> The board is built around the ALINX AC7Z020 system on module with a >> Zynq-7000 (XC7Z020-2CLG400I) SoC, 1 GB DDR3 SDRAM and 32 MB QSPI >> flash, and provides Gigabit Ethernet (JLSemi JL2121 PHY), USB 2.0 >> host, MicroSD slot, dual CAN buses (SN65HVD232 transceivers on >> MIO 10-13), I2C RTC/EEPROM/LM75 and the serial console on UART1. >> DevCFG FPGA manager is also enabled. >> >> The two SMA AD inputs and the spare differential pair are wired to >> XADC aux channels VAUX1, VAUX9 and VAUX12. The XADC hard macro is >> always accessible from the PS, so expose these channels via the >> driver's xlnx,channels property. >> >> Link: https://www.alinx.com/ > Drop link. We do not advertise websites, unless it brings some value. > >> Signed-off-by: Pufan Jin >> --- >> arch/arm/boot/dts/xilinx/Makefile | 1 + >> .../boot/dts/xilinx/zynq-alinx-ac7z020.dtsi | 70 +++++++++ >> .../boot/dts/xilinx/zynq-alinx-ax7z020b.dts | 142 ++++++++++++++++++ >> 3 files changed, 213 insertions(+) >> create mode 100644 arch/arm/boot/dts/xilinx/zynq-alinx-ac7z020.dtsi >> create mode 100644 arch/arm/boot/dts/xilinx/zynq-alinx-ax7z020b.dts > ... > >> diff --git a/arch/arm/boot/dts/xilinx/zynq-alinx-ax7z020b.dts b/arch/arm/boot/dts/xilinx/zynq-alinx-ax7z020b.dts >> new file mode 100644 >> index 0000000000..472d9fcaaf >> --- /dev/null >> +++ b/arch/arm/boot/dts/xilinx/zynq-alinx-ax7z020b.dts >> @@ -0,0 +1,142 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * DTS for ALINX AX7Z020B Development Board >> + * >> + * Copyright (C) 2026 Pufan Jin >> + */ >> + >> +/dts-v1/; >> +#include "zynq-alinx-ac7z020.dtsi" >> +#include >> +#include >> + >> +/ { >> + model = "ALINX AX7Z020B Development Board"; >> + compatible = "alinx,ax7z020b", "alinx,ac7z020", "xlnx,zynq-7000"; >> + >> + aliases { >> + ethernet0 = &gem0; >> + serial0 = &uart1; >> + serial1 = &uart0; >> + mmc0 = &sdhci0; >> + spi0 = &qspi; >> + i2c0 = &i2c0; >> + }; >> + >> + chosen { >> + bootargs = ""; > Drop bootargs, why do you need empty ones anyway? > > >> + stdout-path = "serial0:115200n8"; >> + }; >> + >> + usb_phy0: phy0 { > just "phy" or is there phy-1? > > Best regards, > Krzysztof > Drop link. We do not advertise websites, unless it brings some value. Agreed. I've removed the link in v3. > Drop bootargs, why do you need empty ones anyway? The empty bootargs is not needed. I've removed it. > just "phy" or is there phy-1? There is only one USB PHY on this board. I've renamed the node to "phy". Thanks for the review! Pufan Jin