From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B89DB28E5F6; Fri, 9 May 2025 10:11:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746785515; cv=none; b=n6GQXExkOxDaSwogLKaJS8Qbp97AS6+H8/ftaX3HBxULh0YOGULNzapMFlcRuhOuDguAK63qIdQ1CRfvfAWPulcbMsYLMur/bubRwPIR4GTYTXeS3FyBCR/RXJB+mdFQ86CwGqX/LLZokCfHQNCE40aTwfdKTF45QPwR37kYiBc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746785515; c=relaxed/simple; bh=RyRbJoQqShXjHqdPZDfdYWdVxMf5IuqJKffN44Ywzp4=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ZRQvDjAxPuu6Cp7+TzzwFxy9sFA17pdMVqZX0/fflhgHO5cXQNjOTRpKm56Gc68vFN6cM6Kshs4QGva4V2woqTvyhjPv/qcUMm9Zepn4v60/EhuuEqE2UGFPWenBg/cPm4wQDHTf/npAhVpbMcKM2+mRZ9/xvqIF9bhC6OJSAPg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OUPmnkkT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OUPmnkkT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E247AC4CEE4; Fri, 9 May 2025 10:11:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746785514; bh=RyRbJoQqShXjHqdPZDfdYWdVxMf5IuqJKffN44Ywzp4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=OUPmnkkTtYGDwDaLKEkXkpO1Y7+sXdtrNHxrGy9xkwvNkFjrqJy8O11cnT+q1ES3o 4Y1/3eW29+MFL5dZacp7iSvT/sAHHYFa2O/8FClCvO3gF8LM/Slm/C0truwK5mZByv GI183gv5r+thHGwQfRprn23csSaD/Cfo7NdfqVEooqPrHj7z806vQMcU9BjnvbbI/B Z3dxvFSr4XpZ+SHSe3Cq5UYwkg6XnozVQcCB+5nHf3hy2Rz3P3GDm7WUa/LfrbBzXx QYAMw3jdv1cSZF1CAET6oC9RLDtA1B18la8BiqbrOlUHO4gBFZz8UFGfi9iiZ1kxys cPMWE3hSxNphA== Message-ID: Date: Fri, 9 May 2025 12:11:48 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/8] dt-bindings: media: nxp: Add Wave6 video codec device To: Nas Chung Cc: "mchehab@kernel.org" , "hverkuil@xs4all.nl" , "sebastian.fricke@collabora.com" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "linux-media@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-imx@nxp.com" , "marex@denx.de" , "jackson.lee" , "lafley.kim" References: <20250422093119.595-1-nas.chung@chipsnmedia.com> <20250422093119.595-3-nas.chung@chipsnmedia.com> <20250425-romantic-truthful-dove-3ef949@kuoka> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 09/05/2025 11:59, Nas Chung wrote: >>> +examples: >>> + - | >>> + #include >>> + #include >>> + >>> + soc { >>> + #address-cells = <2>; >>> + #size-cells = <2>; >>> + >>> + vpu: video-codec { >> >> Why this device does not have MMIO? Sorry, but makes little sense and if >> you posted and tested your entire DTS you would see why. > > I initially thought that if the reg property is declared in the child, > it would not need to be declared in the parent node. > I based this approach on the mediatek,mt8195-jpegenc.yaml binding, > where the parent node does not include MMIO. Do you have access to mt8195 datasheet? What is the memory/register layout there? If you do not have access, why do you think these are similar devices? > > But, if this structure is problematic, I will address it in patch v3. > >> >> Can we see the entire DTS? > > Sure ! > Below is the cnm.wave633c.example.dts file created from dt_binding_check. This is not the entire DTS. > > /dts-v1/; > /plugin/; // silence any missing phandle references This is bindings example. I want to see entire DTS or DTSI of the SoC. Once you see entire DTS, you will notice that your current split is just not correct - it should be pretty obvious. And that's why we should keep rejecting such works which do not bring any DTS user, because the no one - neither we nor the contributors - see big picture and if someone saw the big picture then immediately would notice - it's just bollocks. What you claim is: soc@0 { // MMIO bus video-codec { // which is a non-MMIO device and clearly a no-go. Just look how DTS is organized and learn from it. > > /{ > compatible = "foo"; > model = "foo"; > #address-cells = <1>; > #size-cells = <1>; > > > example-0 { > #address-cells = <1>; > #size-cells = <1>; > > > interrupt-parent = <&fake_intc0>; > fake_intc0: fake-interrupt-controller { > interrupt-controller; > #interrupt-cells = < 3 >; > }; > All of above are wrong for the SoC... > > #include > #include > > soc { > #address-cells = <2>; > #size-cells = <2>; > > vpu: video-codec { > compatible = "nxp,imx95-vpu", "cnm,wave633c"; What does this device represent? It is not "ctrl", because you made ctrl separate device node. Your binding description suggests that is the VPU control region. > clocks = <&scmi_clk 115>, > <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>; For which sub devices these clocks are valid? For all of them? > clock-names = "vpu", "vpublk_wave"; > power-domains = <&scmi_devpd 21>; > #address-cells = <2>; > #size-cells = <2>; > ranges; > > vpucore0: video-core@4c480000 { > compatible = "nxp,imx95-vpu-core"; > reg = <0x0 0x4c480000 0x0 0x10000>; > interrupts = ; > }; > > vpucore1: video-core@4c490000 { > compatible = "nxp,imx95-vpu-core"; > reg = <0x0 0x4c490000 0x0 0x10000>; > interrupts = ; > }; > > vpucore2: video-core@4c4a0000 { > compatible = "nxp,imx95-vpu-core"; > reg = <0x0 0x4c4a0000 0x0 0x10000>; > interrupts = ; > }; > > vpucore3: video-core@4c4b0000 { > compatible = "nxp,imx95-vpu-core"; > reg = <0x0 0x4c4b0000 0x0 0x10000>; > interrupts = ; > }; > > vpuctrl: video-controller@4c4c0000 { > compatible = "nxp,imx95-vpu-ctrl"; > reg = <0x0 0x4c4c0000 0x0 0x10000>; > memory-region = <&vpu_boot>; > power-domains = <&scmi_perf 10>; > #cooling-cells = <2>; > sram = <&sram1>; > }; > }; > }; > > }; > }; > >> >> Best regards, >> Krzysztof > Best regards, Krzysztof