* [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts
@ 2023-12-18 14:02 Krishna chaitanya chundru
2024-01-27 22:34 ` Bjorn Andersson
0 siblings, 1 reply; 4+ messages in thread
From: Krishna chaitanya chundru @ 2023-12-18 14:02 UTC (permalink / raw)
To: cros-qcom-dts-watchers, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Prasad Malisetty, Stephen Boyd
Cc: linux-arm-msm, devicetree, linux-kernel, quic_vbadigan,
quic_ramkri, quic_nitegupt, quic_skananth, quic_parass, stable,
Krishna chaitanya chundru
Current MSI's mapping doesn't have all the vectors. This platform
supports 8 vectors each vector supports 32 MSI's, so total MSI's
supported is 256.
Add all the MSI groups supported for this PCIe instance in this platform.
Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
cc: stable@vger.kernel.org
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 66f1eb83cca7..e1dc41705f61 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2146,8 +2146,16 @@ pcie1: pci@1c08000 {
ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi0", "msi1", "msi2", "msi3",
+ "msi4", "msi5", "msi6", "msi7";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
---
base-commit: 5bd7ef53ffe5ca580e93e74eb8c81ed191ddc4bd
change-id: 20231218-additional_msi-6062dc812c29
Best regards,
--
Krishna chaitanya chundru <quic_krichai@quicinc.com>
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts
[not found] <20231218-additional_msi-v1-1-c872ce861a97@quicinc.com>
@ 2024-01-04 8:44 ` Krishna Chaitanya Chundru
2024-01-04 8:49 ` Krzysztof Kozlowski
0 siblings, 1 reply; 4+ messages in thread
From: Krishna Chaitanya Chundru @ 2024-01-04 8:44 UTC (permalink / raw)
To: cros-qcom-dts-watchers, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Stephen Boyd
Cc: linux-arm-msm, devicetree, linux-kernel, quic_vbadigan,
quic_ramkri, quic_nitegupt, quic_skananth, quic_parass, stable
Hi All,
Can you please review this.
Thanks & Regards,
Krishna Chaitanya.
On 12/18/2023 12:01 PM, Krishna chaitanya chundru wrote:
> Current MSI's mapping was incorrect. This platform supports
> 8 vectors each vector supports 32 MSI's, so total MSI's
> supported is 256.
>
> Add all the MSI groups supported for this PCIe instance in this platform.
>
> Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
> cc: stable@vger.kernel.org
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 66f1eb83cca7..e1dc41705f61 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2146,8 +2146,16 @@ pcie1: pci@1c08000 {
> ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
> <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
>
> - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "msi";
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi0", "msi1", "msi2", "msi3",
> + "msi4", "msi5", "msi6", "msi7";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
>
> ---
> base-commit: 5bd7ef53ffe5ca580e93e74eb8c81ed191ddc4bd
> change-id: 20231218-additional_msi-6062dc812c29
>
> Best regards,
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts
2024-01-04 8:44 ` [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts Krishna Chaitanya Chundru
@ 2024-01-04 8:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2024-01-04 8:49 UTC (permalink / raw)
To: Krishna Chaitanya Chundru, cros-qcom-dts-watchers, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Stephen Boyd
Cc: linux-arm-msm, devicetree, linux-kernel, quic_vbadigan,
quic_ramkri, quic_nitegupt, quic_skananth, quic_parass, stable
On 04/01/2024 09:44, Krishna Chaitanya Chundru wrote:
> Hi All,
>
> Can you please review this.
Please look at the kernel release schedule and how it affects SoC trees.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts
2023-12-18 14:02 Krishna chaitanya chundru
@ 2024-01-27 22:34 ` Bjorn Andersson
0 siblings, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2024-01-27 22:34 UTC (permalink / raw)
To: cros-qcom-dts-watchers, Andy Gross, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Prasad Malisetty, Stephen Boyd,
Krishna chaitanya chundru
Cc: linux-arm-msm, devicetree, linux-kernel, quic_vbadigan,
quic_ramkri, quic_nitegupt, quic_skananth, quic_parass, stable
On Mon, 18 Dec 2023 19:32:36 +0530, Krishna chaitanya chundru wrote:
> Current MSI's mapping doesn't have all the vectors. This platform
> supports 8 vectors each vector supports 32 MSI's, so total MSI's
> supported is 256.
>
> Add all the MSI groups supported for this PCIe instance in this platform.
>
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sc7280: Add additional MSI interrupts
commit: b8ba66b40da3230a8675cb5dd5c2dea5bce24d62
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-01-04 8:44 ` [PATCH] arm64: dts: qcom: sc7280: Add additional MSI interrupts Krishna Chaitanya Chundru
2024-01-04 8:49 ` Krzysztof Kozlowski
2023-12-18 14:02 Krishna chaitanya chundru
2024-01-27 22:34 ` Bjorn Andersson
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