From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Abel Vesa <abel.vesa@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Johan Hovold <johan@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Rajendra Nayak <quic_rjendra@quicinc.com>
Subject: Re: [PATCH v3] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
Date: Sat, 22 Jun 2024 13:29:56 +0200 [thread overview]
Message-ID: <f171e9f2-0a62-497b-a460-874d5ee1ada3@linaro.org> (raw)
In-Reply-To: <20240621-x1e80100-dts-thermal-v3-1-abd6f416b609@linaro.org>
On 21.06.2024 9:20 AM, Abel Vesa wrote:
> From: Rajendra Nayak <quic_rjendra@quicinc.com>
>
> Add tsens and thermal zones nodes for x1e80100 SoC.
>
> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> Changes in v3:
> - Changed the upper-lower tsense interrupts to PDC.
I'm still puzzled that the critical irq is not wired up through pdc as
you've said, since it would make a lot of sense that if the thermal subsystem
detects a dangerous situation, the AP would be woken up and the soc would be
then shut down by the OS before any last-moment safety mechanisms (if such
exist) kick in..
Anyway, this looks good now to my brain compiler and the device seems to agree
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
next prev parent reply other threads:[~2024-06-22 11:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-21 7:20 [PATCH v3] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes Abel Vesa
2024-06-22 11:29 ` Konrad Dybcio [this message]
2024-06-23 21:02 ` Bjorn Andersson
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