From: Icenowy Zheng <icenowy@aosc.io>
To: Chen-Yu Tsai <wens@csie.org>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Lee Jones <lee.jones@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 4/5] arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices
Date: Wed, 20 Jun 2018 21:11:02 +0800 [thread overview]
Message-ID: <f17d1d31905cd3276d257053b8ed632de941494c.camel@aosc.io> (raw)
In-Reply-To: <20180620051540.25617-5-wens@csie.org>
在 2018-06-20三的 13:15 +0800，Chen-Yu Tsai写道：
> Now that the device tree binding headers for the R_CCU have been
> merged,
> we can use the macros, instead of raw numbers.
>
> Switch to R_CCU macros for clock and reset indices.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index c72da8cd9ef5..d85070f8c4a2 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -5,7 +5,9 @@
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/sun50i-h6-ccu.h>
> +#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
> #include <dt-bindings/reset/sun50i-h6-ccu.h>
> +#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -198,7 +200,7 @@
> reg = <0x07022000 0x400>;
> interrupts = <GIC_SPI 105
> IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 111
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
> + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
> <&osc32k>;
> clock-names = "apb", "hosc", "losc";
> gpio-controller;
> #gpio-cells = <3>;
> @@ -208,6 +210,7 @@
> r_i2c_pins: r-i2c {
> pins = "PL0", "PL1";
> function = "s_i2c";
> + bias-pull-up;
Should this be included in this patch?
> };
> };
>
> @@ -215,8 +218,8 @@
> compatible = "allwinner,sun6i-a31-i2c";
> reg = <0x07081400 0x400>;
> interrupts = <GIC_SPI 107
> IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&r_ccu 8>;
> - resets = <&r_ccu 4>;
> + clocks = <&r_ccu CLK_R_APB2_I2C>;
> + resets = <&r_ccu RST_R_APB2_I2C>;
> pinctrl-names = "default";
> pinctrl-0 = <&r_i2c_pins>;
> status = "disabled";
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next prev parent reply other threads:[~2018-06-20 13:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 5:15 [PATCH 0/5] arm64: allwinner: h6: Enable AXP805 PMIC on Pine H64 Chen-Yu Tsai
2018-06-20 5:15 ` [PATCH 1/5] dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806 Chen-Yu Tsai
2018-06-26 21:41 ` Rob Herring
2018-07-04 7:29 ` Lee Jones
2018-06-20 5:15 ` [PATCH 2/5] mfd: axp20x: Add self-working mode support " Chen-Yu Tsai
2018-07-04 7:33 ` Lee Jones
2018-06-20 5:15 ` [PATCH 3/5] mfd: axp20x: Support AXP806 in I2C mode Chen-Yu Tsai
2018-07-04 7:33 ` Lee Jones
2018-06-20 5:15 ` [PATCH 4/5] arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices Chen-Yu Tsai
2018-06-20 13:11 ` Icenowy Zheng [this message]
2018-06-20 13:46 ` Chen-Yu Tsai
2018-06-20 5:15 ` [PATCH 5/5] arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64 Chen-Yu Tsai
2018-06-26 0:49 ` Icenowy Zheng
2018-06-26 3:46 ` Chen-Yu Tsai
2018-06-26 5:14 ` [PATCH 0/5] arm64: allwinner: h6: Enable " Icenowy Zheng
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