Re: [PATCH 5/5] spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 27/06/2022 08:47, Chanho Park wrote:
> Add exynosautov9 spi port configuration. It supports up to 12 spis and
> has DIV_4 as the default internal clock divider. The spi also has
> an internal loopback mode to run a loopback test.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/spi/spi-s3c64xx.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> index dd5fc8570bce..67b1fecf6fc6 100644
> --- a/drivers/spi/spi-s3c64xx.c
> +++ b/drivers/spi/spi-s3c64xx.c
> @@ -1447,6 +1447,19 @@ static const struct s3c64xx_spi_port_config exynos5433_spi_port_config = {
>  	.quirks		= S3C64XX_SPI_QUIRK_CS_AUTO,
>  };
>  
> +static struct s3c64xx_spi_port_config exynosautov9_spi_port_config = {

This should be const.

Best regards,
Krzysztof